2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #if defined(CONFIG_OMAP1510)
38 #include <./configs/omap1510.h>
42 *************************************************************************
44 * Jump vector table as in table 3.1 in [1]
46 *************************************************************************
52 ldr pc, _undefined_instruction
53 ldr pc, _software_interrupt
54 ldr pc, _prefetch_abort
60 _undefined_instruction: .word undefined_instruction
61 _software_interrupt: .word software_interrupt
62 _prefetch_abort: .word prefetch_abort
63 _data_abort: .word data_abort
64 _not_used: .word not_used
68 .balignl 16,0xdeadbeef
72 *************************************************************************
74 * Startup Code (reset vector)
76 * do important init only if we don't start from memory!
77 * setup Memory and board specific bits prior to relocation.
78 * relocate armboot to ram
81 *************************************************************************
88 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
95 * These are defined in the board-specific linker script.
105 #ifdef CONFIG_USE_IRQ
106 /* IRQ stack memory (calculated at run-time) */
107 .globl IRQ_STACK_START
111 /* IRQ stack memory (calculated at run-time) */
112 .globl FIQ_STACK_START
117 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
118 /* IRQ stack memory (calculated at run-time) + 8 bytes */
119 .globl IRQ_STACK_START_IN
123 .globl _datarel_start
125 .word __datarel_start
127 .globl _datarelrolocal_start
128 _datarelrolocal_start:
129 .word __datarelrolocal_start
131 .globl _datarellocal_start
133 .word __datarellocal_start
135 .globl _datarelro_start
137 .word __datarelro_start
148 * the actual reset code
153 * set the cpu to SVC32 mode
163 mov r1, #0x81 /* Set ARM925T configuration. */
164 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
167 * turn off the watchdog, unlock/diable sequence
176 * mask all IRQs by setting all bits in the INTMR - default
179 ldr r0, =REG_IHL1_MIR
181 ldr r0, =REG_IHL2_MIR
185 * wait for dpll to lock
196 * we do sys-critical inits only at reboot,
197 * not when booting from ram!
199 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
203 /* Set stackpointer in internal RAM to call board_init_f */
205 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
209 /*------------------------------------------------------------------------------*/
212 * void relocate_code (addr_sp, gd, addr_moni)
214 * This "function" does not return, instead it continues in RAM
215 * after relocating the monitor code.
220 mov r4, r0 /* save addr_sp */
221 mov r5, r1 /* save addr of gd */
222 mov r6, r2 /* save addr of destination */
223 mov r7, r2 /* save addr of destination */
225 /* Set up the stack */
232 sub r2, r3, r2 /* r2 <- size of armboot */
233 add r2, r0, r2 /* r2 <- source end address */
237 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
239 ldmia r0!, {r9-r10} /* copy from source address [r0] */
240 stmia r6!, {r9-r10} /* copy to target address [r1] */
241 cmp r0, r2 /* until source end addreee [r2] */
244 #ifndef CONFIG_PRELOADER
245 /* fix got entries */
246 ldr r1, _TEXT_BASE /* Text base */
247 mov r0, r7 /* reloc addr */
248 ldr r2, _got_start /* addr in Flash */
249 ldr r3, _got_end /* addr in Flash */
264 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
267 #ifndef CONFIG_PRELOADER
270 ldr r3, _TEXT_BASE /* Text base */
271 mov r4, r7 /* reloc addr */
276 mov r2, #0x00000000 /* clear */
278 clbss_l:str r2, [r0] /* clear loop... */
286 * We are done. Do not return, instead branch to second part of board
287 * initialization, now running from RAM.
289 #ifdef CONFIG_NAND_SPL
292 _nand_boot: .word nand_boot
295 ldr r2, _board_init_r
297 add r2, r2, r7 /* position from board_init_r in RAM */
298 /* setup parameters for board_init_r */
299 mov r0, r5 /* gd_t */
300 mov r1, r7 /* dest_addr */
305 _board_init_r: .word board_init_r
308 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
310 * the actual reset code
315 * set the cpu to SVC32 mode
325 mov r1, #0x81 /* Set ARM925T configuration. */
326 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
329 * turn off the watchdog, unlock/diable sequence
338 * mask all IRQs by setting all bits in the INTMR - default
341 ldr r0, =REG_IHL1_MIR
343 ldr r0, =REG_IHL2_MIR
347 * wait for dpll to lock
358 * we do sys-critical inits only at reboot,
359 * not when booting from ram!
361 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
365 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
366 relocate: /* relocate U-Boot to RAM */
367 adr r0, _start /* r0 <- current position of code */
368 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
369 cmp r0, r1 /* don't reloc during debug */
372 ldr r2, _armboot_start
374 sub r2, r3, r2 /* r2 <- size of armboot */
375 add r2, r0, r2 /* r2 <- source end address */
378 ldmia r0!, {r3-r10} /* copy from source address [r0] */
379 stmia r1!, {r3-r10} /* copy to target address [r1] */
380 cmp r0, r2 /* until source end addreee [r2] */
382 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
384 /* Set up the stack */
386 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
387 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
388 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
389 #ifdef CONFIG_USE_IRQ
390 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
392 sub sp, r0, #12 /* leave 3 words for abort-stack */
393 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
396 ldr r0, _bss_start /* find start of bss segment */
397 ldr r1, _bss_end /* stop here */
398 mov r2, #0x00000000 /* clear */
400 clbss_l:str r2, [r0] /* clear loop... */
405 ldr pc, _start_armboot
407 _start_armboot: .word start_armboot
408 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
411 *************************************************************************
413 * CPU_init_critical registers
415 * setup important registers
416 * setup memory timing
418 *************************************************************************
424 * flush v4 I/D caches
427 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
428 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
431 * disable MMU stuff and caches
433 mrc p15, 0, r0, c1, c0, 0
434 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
435 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
436 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
437 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
438 mcr p15, 0, r0, c1, c0, 0
441 * Go setup Memory and board specific bits prior to relocation.
443 mov ip, lr /* perserve link reg across call */
444 bl lowlevel_init /* go setup pll,mux,memory */
445 mov lr, ip /* restore link */
446 mov pc, lr /* back to my caller */
448 *************************************************************************
452 *************************************************************************
458 #define S_FRAME_SIZE 72
480 #define MODE_SVC 0x13
484 * use bad_save_user_regs for abort/prefetch/undef/swi ...
485 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
488 .macro bad_save_user_regs
489 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
490 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
492 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
493 ldr r2, _armboot_start
494 sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
495 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
497 ldr r2, IRQ_STACK_START_IN
499 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
500 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
504 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
505 mov r0, sp @ save current stack into r0 (param register)
508 .macro irq_save_user_regs
509 sub sp, sp, #S_FRAME_SIZE
510 stmia sp, {r0 - r12} @ Calling r0-r12
511 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
512 stmdb r8, {sp, lr}^ @ Calling SP, LR
513 str lr, [r8, #0] @ Save calling PC
515 str r6, [r8, #4] @ Save CPSR
516 str r0, [r8, #8] @ Save OLD_R0
520 .macro irq_restore_user_regs
521 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
523 ldr lr, [sp, #S_PC] @ Get PC
524 add sp, sp, #S_FRAME_SIZE
525 subs pc, lr, #4 @ return & move spsr_svc into cpsr
529 #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
530 ldr r13, _armboot_start @ setup our mode stack
531 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
532 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
534 ldr r13, IRQ_STACK_START_IN
537 str lr, [r13] @ save caller lr in position 0 of saved stack
538 mrs lr, spsr @ get the spsr
539 str lr, [r13, #4] @ save spsr in position 1 of saved stack
541 mov r13, #MODE_SVC @ prepare SVC-Mode
543 msr spsr, r13 @ switch modes, make sure moves will execute
544 mov lr, pc @ capture return pc
545 movs pc, lr @ jump to next instruction & switch modes.
548 .macro get_irq_stack @ setup IRQ stack
549 ldr sp, IRQ_STACK_START
552 .macro get_fiq_stack @ setup FIQ stack
553 ldr sp, FIQ_STACK_START
560 undefined_instruction:
563 bl do_undefined_instruction
569 bl do_software_interrupt
589 #ifdef CONFIG_USE_IRQ
596 irq_restore_user_regs
601 /* someone ought to write a more effiction fiq_save_user_regs */
604 irq_restore_user_regs
625 ldr r1, rstctl1 /* get clkm1 reset ctl */
626 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
627 strh r3, [r1] /* force reset */