2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm-offsets.h>
37 #if defined(CONFIG_OMAP1510)
38 #include <./configs/omap1510.h>
42 *************************************************************************
44 * Jump vector table as in table 3.1 in [1]
46 *************************************************************************
52 ldr pc, _undefined_instruction
53 ldr pc, _software_interrupt
54 ldr pc, _prefetch_abort
60 _undefined_instruction: .word undefined_instruction
61 _software_interrupt: .word software_interrupt
62 _prefetch_abort: .word prefetch_abort
63 _data_abort: .word data_abort
64 _not_used: .word not_used
68 .balignl 16,0xdeadbeef
72 *************************************************************************
74 * Startup Code (reset vector)
76 * do important init only if we don't start from memory!
77 * setup Memory and board specific bits prior to relocation.
78 * relocate armboot to ram
81 *************************************************************************
86 .word CONFIG_SYS_TEXT_BASE
89 * These are defined in the board-specific linker script.
100 /* IRQ stack memory (calculated at run-time) */
101 .globl IRQ_STACK_START
105 /* IRQ stack memory (calculated at run-time) */
106 .globl FIQ_STACK_START
111 /* IRQ stack memory (calculated at run-time) + 8 bytes */
112 .globl IRQ_STACK_START_IN
116 .globl _datarel_start
118 .word __datarel_start
120 .globl _datarelrolocal_start
121 _datarelrolocal_start:
122 .word __datarelrolocal_start
124 .globl _datarellocal_start
126 .word __datarellocal_start
128 .globl _datarelro_start
130 .word __datarelro_start
141 * the actual reset code
146 * set the cpu to SVC32 mode
156 mov r1, #0x81 /* Set ARM925T configuration. */
157 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
160 * turn off the watchdog, unlock/diable sequence
169 * mask all IRQs by setting all bits in the INTMR - default
172 ldr r0, =REG_IHL1_MIR
174 ldr r0, =REG_IHL2_MIR
178 * wait for dpll to lock
189 * we do sys-critical inits only at reboot,
190 * not when booting from ram!
192 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
196 /* Set stackpointer in internal RAM to call board_init_f */
198 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
202 /*------------------------------------------------------------------------------*/
205 * void relocate_code (addr_sp, gd, addr_moni)
207 * This "function" does not return, instead it continues in RAM
208 * after relocating the monitor code.
213 mov r4, r0 /* save addr_sp */
214 mov r5, r1 /* save addr of gd */
215 mov r6, r2 /* save addr of destination */
216 mov r7, r2 /* save addr of destination */
218 /* Set up the stack */
225 sub r2, r3, r2 /* r2 <- size of armboot */
226 add r2, r0, r2 /* r2 <- source end address */
231 ldmia r0!, {r9-r10} /* copy from source address [r0] */
232 stmia r6!, {r9-r10} /* copy to target address [r1] */
233 cmp r0, r2 /* until source end address [r2] */
236 #ifndef CONFIG_PRELOADER
237 /* fix got entries */
238 ldr r1, _TEXT_BASE /* Text base */
239 mov r0, r7 /* reloc addr */
240 ldr r2, _got_start /* addr in Flash */
241 ldr r3, _got_end /* addr in Flash */
258 #ifndef CONFIG_PRELOADER
261 ldr r3, _TEXT_BASE /* Text base */
262 mov r4, r7 /* reloc addr */
267 mov r2, #0x00000000 /* clear */
269 clbss_l:str r2, [r0] /* clear loop... */
277 * We are done. Do not return, instead branch to second part of board
278 * initialization, now running from RAM.
280 #ifdef CONFIG_NAND_SPL
283 _nand_boot: .word nand_boot
286 ldr r2, _board_init_r
288 add r2, r2, r7 /* position from board_init_r in RAM */
289 /* setup parameters for board_init_r */
290 mov r0, r5 /* gd_t */
291 mov r1, r7 /* dest_addr */
296 _board_init_r: .word board_init_r
300 *************************************************************************
302 * CPU_init_critical registers
304 * setup important registers
305 * setup memory timing
307 *************************************************************************
313 * flush v4 I/D caches
316 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
317 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
320 * disable MMU stuff and caches
322 mrc p15, 0, r0, c1, c0, 0
323 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
324 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
325 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
326 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
327 mcr p15, 0, r0, c1, c0, 0
330 * Go setup Memory and board specific bits prior to relocation.
332 mov ip, lr /* perserve link reg across call */
333 bl lowlevel_init /* go setup pll,mux,memory */
334 mov lr, ip /* restore link */
335 mov pc, lr /* back to my caller */
337 *************************************************************************
341 *************************************************************************
347 #define S_FRAME_SIZE 72
369 #define MODE_SVC 0x13
373 * use bad_save_user_regs for abort/prefetch/undef/swi ...
374 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
377 .macro bad_save_user_regs
378 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
379 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
381 ldr r2, IRQ_STACK_START_IN
382 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
383 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
387 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
388 mov r0, sp @ save current stack into r0 (param register)
391 .macro irq_save_user_regs
392 sub sp, sp, #S_FRAME_SIZE
393 stmia sp, {r0 - r12} @ Calling r0-r12
394 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
395 stmdb r8, {sp, lr}^ @ Calling SP, LR
396 str lr, [r8, #0] @ Save calling PC
398 str r6, [r8, #4] @ Save CPSR
399 str r0, [r8, #8] @ Save OLD_R0
403 .macro irq_restore_user_regs
404 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
406 ldr lr, [sp, #S_PC] @ Get PC
407 add sp, sp, #S_FRAME_SIZE
408 subs pc, lr, #4 @ return & move spsr_svc into cpsr
412 ldr r13, IRQ_STACK_START_IN
414 str lr, [r13] @ save caller lr in position 0 of saved stack
415 mrs lr, spsr @ get the spsr
416 str lr, [r13, #4] @ save spsr in position 1 of saved stack
418 mov r13, #MODE_SVC @ prepare SVC-Mode
420 msr spsr, r13 @ switch modes, make sure moves will execute
421 mov lr, pc @ capture return pc
422 movs pc, lr @ jump to next instruction & switch modes.
425 .macro get_irq_stack @ setup IRQ stack
426 ldr sp, IRQ_STACK_START
429 .macro get_fiq_stack @ setup FIQ stack
430 ldr sp, FIQ_STACK_START
437 undefined_instruction:
440 bl do_undefined_instruction
446 bl do_software_interrupt
466 #ifdef CONFIG_USE_IRQ
473 irq_restore_user_regs
478 /* someone ought to write a more effiction fiq_save_user_regs */
481 irq_restore_user_regs
502 ldr r1, rstctl1 /* get clkm1 reset ctl */
503 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
504 strh r3, [r1] /* force reset */