2 * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/cpu.h>
9 #include <asm/arch/clk.h>
10 #include <asm/arch/uart.h>
11 #include <asm/arch/mux.h>
15 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
16 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
17 static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
19 void lpc32xx_uart_init(unsigned int uart_id)
21 if (uart_id < 1 || uart_id > 7)
24 /* Disable loopback mode, if it is set by S1L bootloader */
25 clrbits_le32(&ctrl->loop,
26 UART_LOOPBACK(CONFIG_SYS_LPC32XX_UART));
28 if (uart_id < 3 || uart_id > 6)
31 /* Enable UART system clock */
32 setbits_le32(&clk->uartclk_ctrl, CLK_UART(uart_id));
34 /* Set UART into autoclock mode */
35 clrsetbits_le32(&ctrl->clkmode,
36 UART_CLKMODE_MASK(uart_id),
37 UART_CLKMODE_AUTO(uart_id));
39 /* Bypass pre-divider of UART clock */
40 writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
41 &clk->u3clk + (uart_id - 3));
44 void lpc32xx_mac_init(void)
46 /* Enable MAC interface */
47 writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
48 #if defined(CONFIG_RMII)
56 void lpc32xx_mlc_nand_init(void)
58 /* Enable NAND interface */
59 writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, &clk->flashclk_ctrl);
62 void lpc32xx_slc_nand_init(void)
64 /* Enable SLC NAND interface */
65 writel(CLK_NAND_SLC | CLK_NAND_SLC_SELECT, &clk->flashclk_ctrl);
68 void lpc32xx_i2c_init(unsigned int devnum)
70 /* Enable I2C interface */
71 uint32_t ctrl = readl(&clk->i2cclk_ctrl);
73 ctrl |= CLK_I2C1_ENABLE;
75 ctrl |= CLK_I2C2_ENABLE;
76 writel(ctrl, &clk->i2cclk_ctrl);
79 U_BOOT_DEVICE(lpc32xx_gpios) = {
80 .name = "gpio_lpc32xx"
83 /* Mux for SCK0, MISO0, MOSI0. We do not use SSEL0. */
85 #define P_MUX_SET_SSP0 0x1600
87 void lpc32xx_ssp_init(void)
89 /* Enable SSP0 interface */
90 writel(CLK_SSP0_ENABLE_CLOCK, &clk->ssp_ctrl);
92 writel(P_MUX_SET_SSP0, &mux->p_mux_set);