1 // SPDX-License-Identifier: GPL-2.0+
4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5 * Marius Groeger <mgroeger@sysgo.de>
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Alex Zuepke <azu@sysgo.de>
12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
15 * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
17 * (C) Copyright 2009 DENX Software Engineering
18 * Author: John Rigby <jrigby@gmail.com>
19 * Add support for MX25
24 #include <asm/arch/imx-regs.h>
26 /* nothing really to do with interrupts, just starts up a counter. */
27 /* The 32KHz 32-bit timer overruns in 134217 seconds */
31 struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
32 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
34 /* setup GP Timer 1 */
35 writel(GPT_CTRL_SWR, &gpt->ctrl);
37 writel(readl(&ccm->cgr1) | CCM_CGR1_GPT1, &ccm->cgr1);
39 for (i = 0; i < 100; i++)
40 writel(0, &gpt->ctrl); /* We have no udelay by now */
41 writel(0, &gpt->pre); /* prescaler = 1 */
42 /* Freerun Mode, 32KHz input */
43 writel(readl(&gpt->ctrl) | GPT_CTRL_CLKSOURCE_32 | GPT_CTRL_FRR,
45 writel(readl(&gpt->ctrl) | GPT_CTRL_TEN, &gpt->ctrl);