2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Groger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Zupke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * Change to support call back into iMX28 bootrom
16 * Copyright (c) 2011 Marek Vasut <marek.vasut@gmail.com>
17 * on behalf of DENX Software Engineering GmbH
19 * SPDX-License-Identifier: GPL-2.0+
22 #include <asm-offsets.h>
27 *************************************************************************
29 * Startup Code (reset vector)
31 * do important init only if we don't start from memory!
32 * setup Memory and board specific bits prior to relocation.
33 * relocate armboot to ram
36 *************************************************************************
42 * If the CPU is configured in "Wait JTAG connection mode", the stack
43 * pointer is not configured and is zero. This will cause crash when
44 * trying to push data onto stack right below here. Load the SP and make
45 * it point to the end of OCRAM if the SP is zero.
48 ldreq sp, =CONFIG_SYS_INIT_SP_ADDR
51 * Store all registers on old stack pointer, this will allow us later to
52 * return to the BootROM and let the BootROM load U-Boot into RAM.
54 * WARNING: Register r0 and r1 are used by the BootROM to pass data
55 * to the called code. Register r0 will contain arbitrary
56 * data that are set in the BootStream. In case this code
57 * was started with CALL instruction, register r1 will contain
58 * pointer to the return value this function can then set.
59 * The code below MUST NOT CHANGE register r0 and r1 !
63 /* Save control register c1 */
64 mrc p15, 0, r2, c1, c0, 0
67 /* Set the cpu to SVC32 mode and store old CPSR register content. */
76 /* Restore BootROM's CPU mode (especially FIQ). */
81 * Restore c1 register. Especially set exception vector location
82 * back to BootROM space which is required by bootrom for USB boot.
85 mcr p15, 0, r2, c1, c0, 0
90 * In case this code was started by the CALL instruction, the register
91 * r0 is examined by the BootROM after this code returns. The value in
92 * r0 must be set to 0 to indicate successful return.