2 * Freescale i.MX28 timer driver
4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5 * on behalf of DENX Software Engineering GmbH
7 * Based on code from LTIB:
8 * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/sys_proto.h>
18 /* Maximum fixed count */
19 #if defined(CONFIG_MX23)
20 #define TIMER_LOAD_VAL 0xffff
21 #elif defined(CONFIG_MX28)
22 #define TIMER_LOAD_VAL 0xffffffff
25 DECLARE_GLOBAL_DATA_PTR;
27 #define timestamp (gd->arch.tbl)
28 #define lastdec (gd->arch.lastinc)
31 * This driver uses 1kHz clock source.
33 #define MXS_INCREMENTER_HZ 1000
35 static inline unsigned long tick_to_time(unsigned long tick)
37 return tick / (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
40 static inline unsigned long time_to_tick(unsigned long time)
42 return time * (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
45 /* Calculate how many ticks happen in "us" microseconds */
46 static inline unsigned long us_to_tick(unsigned long us)
48 return (us * MXS_INCREMENTER_HZ) / 1000000;
53 struct mxs_timrot_regs *timrot_regs =
54 (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
56 /* Reset Timers and Rotary Encoder module */
57 mxs_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
59 /* Set fixed_count to 0 */
60 #if defined(CONFIG_MX23)
61 writel(0, &timrot_regs->hw_timrot_timcount0);
62 #elif defined(CONFIG_MX28)
63 writel(0, &timrot_regs->hw_timrot_fixed_count0);
66 /* Set UPDATE bit and 1Khz frequency */
67 writel(TIMROT_TIMCTRLn_UPDATE | TIMROT_TIMCTRLn_RELOAD |
68 TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL,
69 &timrot_regs->hw_timrot_timctrl0);
71 /* Set fixed_count to maximal value */
72 #if defined(CONFIG_MX23)
73 writel(TIMER_LOAD_VAL - 1, &timrot_regs->hw_timrot_timcount0);
74 #elif defined(CONFIG_MX28)
75 writel(TIMER_LOAD_VAL, &timrot_regs->hw_timrot_fixed_count0);
81 unsigned long long get_ticks(void)
83 struct mxs_timrot_regs *timrot_regs =
84 (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
87 /* Current tick value */
88 #if defined(CONFIG_MX23)
89 /* Upper bits are the valid ones. */
90 now = readl(&timrot_regs->hw_timrot_timcount0) >>
91 TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET;
92 #elif defined(CONFIG_MX28)
93 now = readl(&timrot_regs->hw_timrot_running_count0);
95 #error "Don't know how to read timrot_regs"
100 * normal mode (non roll)
101 * move stamp forward with absolut diff ticks
103 timestamp += (lastdec - now);
105 /* we have rollover of decrementer */
106 timestamp += (TIMER_LOAD_VAL - now) + lastdec;
114 ulong get_timer_masked(void)
116 return tick_to_time(get_ticks());
119 ulong get_timer(ulong base)
121 return get_timer_masked() - base;
124 /* We use the HW_DIGCTL_MICROSECONDS register for sub-millisecond timer. */
125 #define MXS_HW_DIGCTL_MICROSECONDS 0x8001c0c0
127 void __udelay(unsigned long usec)
129 uint32_t old, new, incr;
130 uint32_t counter = 0;
132 old = readl(MXS_HW_DIGCTL_MICROSECONDS);
134 while (counter < usec) {
135 new = readl(MXS_HW_DIGCTL_MICROSECONDS);
137 /* Check if the timer wrapped. */
139 incr = 0xffffffff - old;
146 * Check if we are close to the maximum time and the counter
147 * would wrap if incremented. If that's the case, break out
148 * from the loop as the requested delay time passed.
150 if (counter + incr < counter)
158 ulong get_tbclk(void)
160 return MXS_INCREMENTER_HZ;