2 * OMAP1 CPU identification code
4 * Copyright (C) 2004 Nokia Corporation
5 * Written by Tony Lindgren <tony@atomide.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
15 #if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP)
17 #define omap_readw(x) *(volatile unsigned short *)(x)
18 #define omap_readl(x) *(volatile unsigned long *)(x)
20 #define OMAP_DIE_ID_0 0xfffe1800
21 #define OMAP_DIE_ID_1 0xfffe1804
22 #define OMAP_PRODUCTION_ID_0 0xfffe2000
23 #define OMAP_PRODUCTION_ID_1 0xfffe2004
24 #define OMAP32_ID_0 0xfffed400
25 #define OMAP32_ID_1 0xfffed404
28 u16 jtag_id; /* Used to determine OMAP type */
29 u8 die_rev; /* Processor revision */
30 u32 omap_id; /* OMAP revision */
31 u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
34 /* Register values to detect the OMAP version */
35 static struct omap_id omap_ids[] = {
36 { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
37 { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
38 { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
39 { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
40 { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
41 { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
42 { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
43 { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
44 { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
45 { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
46 { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
47 { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
48 { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
49 { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
50 { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
51 { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
52 { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
53 { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
54 { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
58 * Get OMAP type from PROD_ID.
59 * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
60 * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
61 * Undocumented register in TEST BLOCK is used as fallback; This seems to
62 * work on 1510, 1610 & 1710. The official way hopefully will work in future
65 static u16 omap_get_jtag_id(void)
69 prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
70 omap_id = omap_readl(OMAP32_ID_1);
72 /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
73 if (((prod_id >> 20) == 0) || (prod_id == omap_id))
81 /* Use OMAP32_ID_1 as fallback */
82 prod_id = ((omap_id >> 12) & 0xffff);
88 * Get OMAP revision from DIE_REV.
89 * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
90 * Undocumented register in the TEST BLOCK is used as fallback.
91 * REVISIT: This does not seem to work on 1510
93 static u8 omap_get_die_rev(void)
97 die_rev = omap_readl(OMAP_DIE_ID_1);
99 /* Check for broken OMAP_DIE_ID on early 1710 */
100 if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
103 die_rev = (die_rev >> 17) & 0xf;
107 die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
112 static unsigned long dpll1(void)
114 unsigned short pll_ctl_val = omap_readw(DPLL_CTL_REG);
117 rate = CONFIG_SYS_CLK_FREQ; /* Base xtal rate */
118 if (pll_ctl_val & 0x10) {
119 /* PLL enabled, apply multiplier and divisor */
120 if (pll_ctl_val & 0xf80)
121 rate *= (pll_ctl_val & 0xf80) >> 7;
122 rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
124 /* PLL disabled, apply bypass divisor */
125 switch (pll_ctl_val & 0xc) {
140 static unsigned long armcore(void)
142 unsigned short arm_ckctl = omap_readw(ARM_CKCTL);
144 return (dpll1() >> ((arm_ckctl & 0x0030) >> 4));
147 int print_cpuinfo (void)
154 u32 system_serial_high;
155 u32 system_serial_low;
158 jtag_id = omap_get_jtag_id();
159 die_rev = omap_get_die_rev();
160 omap_id = omap_readl(OMAP32_ID_0);
163 printf("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
164 printf("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
165 omap_readl(OMAP_DIE_ID_1),
166 (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
167 printf("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
168 printf("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
169 omap_readl(OMAP_PRODUCTION_ID_1),
170 omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
171 printf("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
172 printf("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
173 printf("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
176 system_serial_high = omap_readl(OMAP_DIE_ID_0);
177 system_serial_low = omap_readl(OMAP_DIE_ID_1);
179 /* First check only the major version in a safe way */
180 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
181 if (jtag_id == (omap_ids[i].jtag_id)) {
182 system_rev = omap_ids[i].type;
187 /* Check if we can find the die revision */
188 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
189 if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
190 system_rev = omap_ids[i].type;
195 /* Finally check also the omap_id */
196 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
197 if (jtag_id == omap_ids[i].jtag_id
198 && die_rev == omap_ids[i].die_rev
199 && omap_id == omap_ids[i].omap_id) {
200 system_rev = omap_ids[i].type;
205 /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
206 cpu_type = system_rev >> 24;
224 printf("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
227 printf("CPU: OMAP%04x", system_rev >> 16);
228 if ((system_rev >> 8) & 0xff)
229 printf("%x", (system_rev >> 8) & 0xff);
231 printf(" revision %i handled as %02xxx id: %08x%08x",
232 die_rev, system_rev & 0xff, system_serial_low, system_serial_high);
234 printf(" at %ld.%01ld MHz (DPLL1=%ld.%01ld MHz)\n",
235 armcore() / 1000000, (armcore() / 100000) % 10,
236 dpll1() / 1000000, (dpll1() / 100000) % 10);
241 #endif /* #if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_OMAP) */