2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm-offsets.h>
39 #if defined(CONFIG_OMAP1610)
40 #include <./configs/omap1510.h>
41 #elif defined(CONFIG_OMAP730)
42 #include <./configs/omap730.h>
46 *************************************************************************
48 * Jump vector table as in table 3.1 in [1]
50 *************************************************************************
57 #ifdef CONFIG_PRELOADER
58 /* No exception handlers in preloader */
69 /* pad to 64 byte boundary */
78 ldr pc, _undefined_instruction
79 ldr pc, _software_interrupt
80 ldr pc, _prefetch_abort
86 _undefined_instruction:
87 .word undefined_instruction
89 .word software_interrupt
101 #endif /* CONFIG_PRELOADER */
102 .balignl 16,0xdeadbeef
106 *************************************************************************
108 * Startup Code (reset vector)
110 * do important init only if we don't start from memory!
111 * setup Memory and board specific bits prior to relocation.
112 * relocate armboot to ram
115 *************************************************************************
120 .word CONFIG_SYS_TEXT_BASE
123 * These are defined in the board-specific linker script.
124 * Subtracting _start from them lets the linker put their
125 * relative position in the executable instead of leaving
128 .globl _bss_start_ofs
130 .word __bss_start - _start
134 .word __bss_end__ - _start
140 #ifdef CONFIG_USE_IRQ
141 /* IRQ stack memory (calculated at run-time) */
142 .globl IRQ_STACK_START
146 /* IRQ stack memory (calculated at run-time) */
147 .globl FIQ_STACK_START
152 /* IRQ stack memory (calculated at run-time) + 8 bytes */
153 .globl IRQ_STACK_START_IN
158 * the actual reset code
163 * set the cpu to SVC32 mode
171 * we do sys-critical inits only at reboot,
172 * not when booting from ram!
174 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
178 /* Set stackpointer in internal RAM to call board_init_f */
180 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
181 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
185 /*------------------------------------------------------------------------------*/
188 * void relocate_code (addr_sp, gd, addr_moni)
190 * This "function" does not return, instead it continues in RAM
191 * after relocating the monitor code.
196 mov r4, r0 /* save addr_sp */
197 mov r5, r1 /* save addr of gd */
198 mov r6, r2 /* save addr of destination */
200 /* Set up the stack */
206 beq clear_bss /* skip relocation */
207 mov r1, r6 /* r1 <- scratch for copy loop */
208 ldr r3, _bss_start_ofs
209 add r2, r0, r3 /* r2 <- source end address */
212 ldmia r0!, {r9-r10} /* copy from source address [r0] */
213 stmia r1!, {r9-r10} /* copy to target address [r1] */
214 cmp r0, r2 /* until source end address [r2] */
217 #ifndef CONFIG_PRELOADER
219 * fix .rel.dyn relocations
221 ldr r0, _TEXT_BASE /* r0 <- Text base */
222 sub r9, r6, r0 /* r9 <- relocation offset */
223 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
224 add r10, r10, r0 /* r10 <- sym table in FLASH */
225 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
226 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
227 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
228 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
230 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
231 add r0, r0, r9 /* r0 <- location to fix up in RAM */
234 cmp r7, #23 /* relative fixup? */
236 cmp r7, #2 /* absolute fixup? */
238 /* ignore unknown type of fixup */
241 /* absolute fix: set location to (offset) symbol value */
242 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
243 add r1, r10, r1 /* r1 <- address of symbol in table */
244 ldr r1, [r1, #4] /* r1 <- symbol value */
245 add r1, r1, r9 /* r1 <- relocated sym addr */
248 /* relative fix: increase location by offset */
253 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
259 #ifndef CONFIG_PRELOADER
260 ldr r0, _bss_start_ofs
262 mov r4, r6 /* reloc addr */
265 mov r2, #0x00000000 /* clear */
267 clbss_l:str r2, [r0] /* clear loop... */
277 * We are done. Do not return, instead branch to second part of board
278 * initialization, now running from RAM.
280 #ifdef CONFIG_NAND_SPL
281 ldr r0, _nand_boot_ofs
287 ldr r0, _board_init_r_ofs
291 /* setup parameters for board_init_r */
292 mov r0, r5 /* gd_t */
293 mov r1, r6 /* dest_addr */
298 .word board_init_r - _start
302 .word __rel_dyn_start - _start
304 .word __rel_dyn_end - _start
306 .word __dynsym_start - _start
309 *************************************************************************
311 * CPU_init_critical registers
313 * setup important registers
314 * setup memory timing
316 *************************************************************************
318 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
321 * flush v4 I/D caches
324 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
325 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
328 * disable MMU stuff and caches
330 mrc p15, 0, r0, c1, c0, 0
331 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
332 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
333 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
334 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
335 mcr p15, 0, r0, c1, c0, 0
338 * Go setup Memory and board specific bits prior to relocation.
340 mov ip, lr /* perserve link reg across call */
341 bl lowlevel_init /* go setup pll,mux,memory */
342 mov lr, ip /* restore link */
343 mov pc, lr /* back to my caller */
344 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
346 #ifndef CONFIG_PRELOADER
348 *************************************************************************
352 *************************************************************************
358 #define S_FRAME_SIZE 72
380 #define MODE_SVC 0x13
384 * use bad_save_user_regs for abort/prefetch/undef/swi ...
385 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
388 .macro bad_save_user_regs
389 @ carve out a frame on current user stack
390 sub sp, sp, #S_FRAME_SIZE
391 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
392 ldr r2, IRQ_STACK_START_IN
393 @ get values for "aborted" pc and cpsr (into parm regs)
395 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
398 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
399 mov r0, sp @ save current stack into r0 (param register)
402 .macro irq_save_user_regs
403 sub sp, sp, #S_FRAME_SIZE
404 stmia sp, {r0 - r12} @ Calling r0-r12
405 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
407 stmdb r8, {sp, lr}^ @ Calling SP, LR
408 str lr, [r8, #0] @ Save calling PC
410 str r6, [r8, #4] @ Save CPSR
411 str r0, [r8, #8] @ Save OLD_R0
415 .macro irq_restore_user_regs
416 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
418 ldr lr, [sp, #S_PC] @ Get PC
419 add sp, sp, #S_FRAME_SIZE
420 subs pc, lr, #4 @ return & move spsr_svc into cpsr
424 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
426 str lr, [r13] @ save caller lr in position 0 of saved stack
427 mrs lr, spsr @ get the spsr
428 str lr, [r13, #4] @ save spsr in position 1 of saved stack
429 mov r13, #MODE_SVC @ prepare SVC-Mode
431 msr spsr, r13 @ switch modes, make sure moves will execute
432 mov lr, pc @ capture return pc
433 movs pc, lr @ jump to next instruction & switch modes.
436 .macro get_irq_stack @ setup IRQ stack
437 ldr sp, IRQ_STACK_START
440 .macro get_fiq_stack @ setup FIQ stack
441 ldr sp, FIQ_STACK_START
443 #endif /* CONFIG_PRELOADER */
448 #ifdef CONFIG_PRELOADER
451 ldr sp, _TEXT_BASE /* switch to abort stack */
453 bl 1b /* hang and never return */
454 #else /* !CONFIG_PRELOADER */
456 undefined_instruction:
459 bl do_undefined_instruction
465 bl do_software_interrupt
485 #ifdef CONFIG_USE_IRQ
492 irq_restore_user_regs
497 /* someone ought to write a more effiction fiq_save_user_regs */
500 irq_restore_user_regs
517 #endif /* CONFIG_PRELOADER */