2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * SPDX-License-Identifier: GPL-2.0+
18 #include <asm-offsets.h>
23 *************************************************************************
25 * Jump vector table as in table 3.1 in [1]
27 *************************************************************************
34 ldr pc, _undefined_instruction
35 ldr pc, _software_interrupt
36 ldr pc, _prefetch_abort
42 _undefined_instruction:
43 .word undefined_instruction
45 .word software_interrupt
57 .balignl 16,0xdeadbeef
62 *************************************************************************
64 * Startup Code (reset vector)
66 * do important init only if we don't start from memory!
67 * setup Memory and board specific bits prior to relocation.
68 * relocate armboot to ram
71 *************************************************************************
75 /* IRQ stack memory (calculated at run-time) */
76 .globl IRQ_STACK_START
80 /* IRQ stack memory (calculated at run-time) */
81 .globl FIQ_STACK_START
86 /* IRQ stack memory (calculated at run-time) + 8 bytes */
87 .globl IRQ_STACK_START_IN
92 * the actual reset code
97 * set the cpu to SVC32 mode
105 * we do sys-critical inits only at reboot,
106 * not when booting from ram!
108 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
114 /*------------------------------------------------------------------------------*/
116 .globl c_runtime_cpu_setup
122 *************************************************************************
124 * CPU_init_critical registers
126 * setup important registers
127 * setup memory timing
129 *************************************************************************
133 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
136 * flush v4 I/D caches
139 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
140 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
143 * disable MMU stuff and caches
145 mrc p15, 0, r0, c1, c0, 0
146 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
147 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
148 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
149 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
150 mcr p15, 0, r0, c1, c0, 0
153 * Go setup Memory and board specific bits prior to relocation.
155 mov ip, lr /* perserve link reg across call */
156 bl lowlevel_init /* go setup memory */
157 mov lr, ip /* restore link */
158 mov pc, lr /* back to my caller */
161 *************************************************************************
165 *************************************************************************
171 #define S_FRAME_SIZE 72
193 #define MODE_SVC 0x13
197 * use bad_save_user_regs for abort/prefetch/undef/swi ...
198 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
201 .macro bad_save_user_regs
202 @ carve out a frame on current user stack
203 sub sp, sp, #S_FRAME_SIZE
204 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
206 ldr r2, IRQ_STACK_START_IN
207 @ get values for "aborted" pc and cpsr (into parm regs)
209 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
212 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
213 mov r0, sp @ save current stack into r0 (param register)
216 .macro irq_save_user_regs
217 sub sp, sp, #S_FRAME_SIZE
218 stmia sp, {r0 - r12} @ Calling r0-r12
219 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
221 stmdb r8, {sp, lr}^ @ Calling SP, LR
222 str lr, [r8, #0] @ Save calling PC
224 str r6, [r8, #4] @ Save CPSR
225 str r0, [r8, #8] @ Save OLD_R0
229 .macro irq_restore_user_regs
230 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
232 ldr lr, [sp, #S_PC] @ Get PC
233 add sp, sp, #S_FRAME_SIZE
234 subs pc, lr, #4 @ return & move spsr_svc into cpsr
238 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
240 str lr, [r13] @ save caller lr in position 0 of saved stack
241 mrs lr, spsr @ get the spsr
242 str lr, [r13, #4] @ save spsr in position 1 of saved stack
243 mov r13, #MODE_SVC @ prepare SVC-Mode
245 msr spsr, r13 @ switch modes, make sure moves will execute
246 mov lr, pc @ capture return pc
247 movs pc, lr @ jump to next instruction & switch modes.
250 .macro get_irq_stack @ setup IRQ stack
251 ldr sp, IRQ_STACK_START
254 .macro get_fiq_stack @ setup FIQ stack
255 ldr sp, FIQ_STACK_START
262 undefined_instruction:
265 bl do_undefined_instruction
271 bl do_software_interrupt
291 #ifdef CONFIG_USE_IRQ
298 irq_restore_user_regs
303 /* someone ought to write a more effiction fiq_save_user_regs */
306 irq_restore_user_regs
324 # ifdef CONFIG_INTEGRATOR
326 /* Satisfied by general board level routine */
334 ldr r1, rstctl1 /* get clkm1 reset ctl */
336 strh r3, [r1] /* clear it */
338 strh r3, [r1] /* force dsp+arm reset */
345 #endif /* #ifdef CONFIG_INTEGRATOR */