2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm-offsets.h>
39 *************************************************************************
41 * Jump vector table as in table 3.1 in [1]
43 *************************************************************************
50 ldr pc, _undefined_instruction
51 ldr pc, _software_interrupt
52 ldr pc, _prefetch_abort
58 _undefined_instruction:
59 .word undefined_instruction
61 .word software_interrupt
73 .balignl 16,0xdeadbeef
78 *************************************************************************
80 * Startup Code (reset vector)
82 * do important init only if we don't start from memory!
83 * setup Memory and board specific bits prior to relocation.
84 * relocate armboot to ram
87 *************************************************************************
92 .word CONFIG_SYS_TEXT_BASE
95 * These are defined in the board-specific linker script.
96 * Subtracting _start from them lets the linker put their
97 * relative position in the executable instead of leaving
100 .globl _bss_start_ofs
102 .word __bss_start - _start
106 .word __bss_end__ - _start
112 #ifdef CONFIG_USE_IRQ
113 /* IRQ stack memory (calculated at run-time) */
114 .globl IRQ_STACK_START
118 /* IRQ stack memory (calculated at run-time) */
119 .globl FIQ_STACK_START
124 /* IRQ stack memory (calculated at run-time) + 8 bytes */
125 .globl IRQ_STACK_START_IN
130 * the actual reset code
135 * set the cpu to SVC32 mode
143 * we do sys-critical inits only at reboot,
144 * not when booting from ram!
146 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
150 /* Set stackpointer in internal RAM to call board_init_f */
152 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
153 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
157 /*------------------------------------------------------------------------------*/
160 * void relocate_code (addr_sp, gd, addr_moni)
162 * This "function" does not return, instead it continues in RAM
163 * after relocating the monitor code.
168 mov r4, r0 /* save addr_sp */
169 mov r5, r1 /* save addr of gd */
170 mov r6, r2 /* save addr of destination */
172 /* Set up the stack */
178 beq clear_bss /* skip relocation */
179 mov r1, r6 /* r1 <- scratch for copy_loop */
180 ldr r3, _bss_start_ofs
181 add r2, r0, r3 /* r2 <- source end address */
184 ldmia r0!, {r9-r10} /* copy from source address [r0] */
185 stmia r1!, {r9-r10} /* copy to target address [r1] */
186 cmp r0, r2 /* until source end address [r2] */
189 #ifndef CONFIG_SPL_BUILD
191 * fix .rel.dyn relocations
193 ldr r0, _TEXT_BASE /* r0 <- Text base */
194 sub r9, r6, r0 /* r9 <- relocation offset */
195 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
196 add r10, r10, r0 /* r10 <- sym table in FLASH */
197 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
198 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
199 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
200 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
202 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
203 add r0, r0, r9 /* r0 <- location to fix up in RAM */
206 cmp r7, #23 /* relative fixup? */
208 cmp r7, #2 /* absolute fixup? */
210 /* ignore unknown type of fixup */
213 /* absolute fix: set location to (offset) symbol value */
214 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
215 add r1, r10, r1 /* r1 <- address of symbol in table */
216 ldr r1, [r1, #4] /* r1 <- symbol value */
217 add r1, r1, r9 /* r1 <- relocated sym addr */
220 /* relative fix: increase location by offset */
225 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
231 #ifndef CONFIG_SPL_BUILD
232 ldr r0, _bss_start_ofs
234 mov r4, r6 /* reloc addr */
237 mov r2, #0x00000000 /* clear */
239 clbss_l:cmp r0, r1 /* clear loop... */
240 bhs clbss_e /* if reached end of bss, exit */
248 * We are done. Do not return, instead branch to second part of board
249 * initialization, now running from RAM.
251 #ifdef CONFIG_NAND_SPL
254 _nand_boot: .word nand_boot
256 ldr r0, _board_init_r_ofs
260 /* setup parameters for board_init_r */
261 mov r0, r5 /* gd_t */
262 mov r1, r6 /* dest_addr */
267 .word board_init_r - _start
271 .word __rel_dyn_start - _start
273 .word __rel_dyn_end - _start
275 .word __dynsym_start - _start
278 *************************************************************************
280 * CPU_init_critical registers
282 * setup important registers
283 * setup memory timing
285 *************************************************************************
289 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
292 * flush v4 I/D caches
295 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
296 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
299 * disable MMU stuff and caches
301 mrc p15, 0, r0, c1, c0, 0
302 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
303 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
304 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
305 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
306 mcr p15, 0, r0, c1, c0, 0
309 * Go setup Memory and board specific bits prior to relocation.
311 mov ip, lr /* perserve link reg across call */
312 bl lowlevel_init /* go setup memory */
313 mov lr, ip /* restore link */
314 mov pc, lr /* back to my caller */
317 *************************************************************************
321 *************************************************************************
327 #define S_FRAME_SIZE 72
349 #define MODE_SVC 0x13
353 * use bad_save_user_regs for abort/prefetch/undef/swi ...
354 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
357 .macro bad_save_user_regs
358 @ carve out a frame on current user stack
359 sub sp, sp, #S_FRAME_SIZE
360 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
362 ldr r2, IRQ_STACK_START_IN
363 @ get values for "aborted" pc and cpsr (into parm regs)
365 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
368 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
369 mov r0, sp @ save current stack into r0 (param register)
372 .macro irq_save_user_regs
373 sub sp, sp, #S_FRAME_SIZE
374 stmia sp, {r0 - r12} @ Calling r0-r12
375 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
377 stmdb r8, {sp, lr}^ @ Calling SP, LR
378 str lr, [r8, #0] @ Save calling PC
380 str r6, [r8, #4] @ Save CPSR
381 str r0, [r8, #8] @ Save OLD_R0
385 .macro irq_restore_user_regs
386 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
388 ldr lr, [sp, #S_PC] @ Get PC
389 add sp, sp, #S_FRAME_SIZE
390 subs pc, lr, #4 @ return & move spsr_svc into cpsr
394 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
396 str lr, [r13] @ save caller lr in position 0 of saved stack
397 mrs lr, spsr @ get the spsr
398 str lr, [r13, #4] @ save spsr in position 1 of saved stack
399 mov r13, #MODE_SVC @ prepare SVC-Mode
401 msr spsr, r13 @ switch modes, make sure moves will execute
402 mov lr, pc @ capture return pc
403 movs pc, lr @ jump to next instruction & switch modes.
406 .macro get_irq_stack @ setup IRQ stack
407 ldr sp, IRQ_STACK_START
410 .macro get_fiq_stack @ setup FIQ stack
411 ldr sp, FIQ_STACK_START
418 undefined_instruction:
421 bl do_undefined_instruction
427 bl do_software_interrupt
447 #ifdef CONFIG_USE_IRQ
454 irq_restore_user_regs
459 /* someone ought to write a more effiction fiq_save_user_regs */
462 irq_restore_user_regs
480 # ifdef CONFIG_INTEGRATOR
482 /* Satisfied by general board level routine */
490 ldr r1, rstctl1 /* get clkm1 reset ctl */
492 strh r3, [r1] /* clear it */
494 strh r3, [r1] /* force dsp+arm reset */
501 #endif /* #ifdef CONFIG_INTEGRATOR */