2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm-offsets.h>
38 *************************************************************************
42 *************************************************************************
48 ldr pc, _undefined_instruction
49 ldr pc, _software_interrupt
50 ldr pc, _prefetch_abort
56 _undefined_instruction:
57 .word undefined_instruction
59 .word software_interrupt
71 .balignl 16,0xdeadbeef
74 *************************************************************************
76 * Startup Code (reset vector)
78 * do important init only if we don't start from memory!
79 * setup memory and board specific bits prior to relocation.
80 * relocate armboot to ram
83 *************************************************************************
88 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
89 .word CONFIG_SPL_TEXT_BASE
91 .word CONFIG_SYS_TEXT_BASE
95 * These are defined in the board-specific linker script.
96 * Subtracting _start from them lets the linker put their
97 * relative position in the executable instead of leaving
100 .globl _bss_start_ofs
102 .word __bss_start - _start
106 .word __bss_end - _start
112 #ifdef CONFIG_USE_IRQ
113 /* IRQ stack memory (calculated at run-time) */
114 .globl IRQ_STACK_START
118 /* IRQ stack memory (calculated at run-time) */
119 .globl FIQ_STACK_START
124 /* IRQ stack memory (calculated at run-time) + 8 bytes */
125 .globl IRQ_STACK_START_IN
130 * the actual reset code
135 * set the cpu to SVC32 mode
143 * we do sys-critical inits only at reboot,
144 * not when booting from ram!
146 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
152 /*------------------------------------------------------------------------------*/
155 * void relocate_code (addr_sp, gd, addr_moni)
157 * This function relocates the monitor code.
161 mov r4, r0 /* save addr_sp */
162 mov r5, r1 /* save addr of gd */
163 mov r6, r2 /* save addr of destination */
166 subs r9, r6, r0 /* r9 <- relocation offset */
167 beq relocate_done /* skip relocation */
168 mov r1, r6 /* r1 <- scratch for copy_loop */
169 ldr r3, _bss_start_ofs
170 add r2, r0, r3 /* r2 <- source end address */
173 ldmia r0!, {r10-r11} /* copy from source address [r0] */
174 stmia r1!, {r10-r11} /* copy to target address [r1] */
175 cmp r0, r2 /* until source end address [r2] */
178 #ifndef CONFIG_SPL_BUILD
180 * fix .rel.dyn relocations
182 ldr r0, _TEXT_BASE /* r0 <- Text base */
183 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
184 add r10, r10, r0 /* r10 <- sym table in FLASH */
185 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
186 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
187 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
188 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
190 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
191 add r0, r0, r9 /* r0 <- location to fix up in RAM */
194 cmp r7, #23 /* relative fixup? */
196 cmp r7, #2 /* absolute fixup? */
198 /* ignore unknown type of fixup */
201 /* absolute fix: set location to (offset) symbol value */
202 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
203 add r1, r10, r1 /* r1 <- address of symbol in table */
204 ldr r1, [r1, #4] /* r1 <- symbol value */
205 add r1, r1, r9 /* r1 <- relocated sym addr */
208 /* relative fix: increase location by offset */
213 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
223 .word __rel_dyn_start - _start
225 .word __rel_dyn_end - _start
227 .word __dynsym_start - _start
229 .globl c_runtime_cpu_setup
235 *************************************************************************
237 * CPU_init_critical registers
239 * setup important registers
240 * setup memory timing
242 *************************************************************************
245 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
247 /* arm_int_generic assumes the ARM boot monitor, or user software,
248 * has initialized the platform
250 mov pc, lr /* back to my caller */
253 *************************************************************************
257 *************************************************************************
263 #define S_FRAME_SIZE 72
285 #define MODE_SVC 0x13
289 * use bad_save_user_regs for abort/prefetch/undef/swi ...
290 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
293 .macro bad_save_user_regs
294 @ carve out a frame on current user stack
295 sub sp, sp, #S_FRAME_SIZE
296 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
298 ldr r2, IRQ_STACK_START_IN
299 @ get values for "aborted" pc and cpsr (into parm regs)
301 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
304 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
305 mov r0, sp @ save current stack into r0 (param register)
308 .macro irq_save_user_regs
309 sub sp, sp, #S_FRAME_SIZE
310 stmia sp, {r0 - r12} @ Calling r0-r12
311 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
313 stmdb r8, {sp, lr}^ @ Calling SP, LR
314 str lr, [r8, #0] @ Save calling PC
316 str r6, [r8, #4] @ Save CPSR
317 str r0, [r8, #8] @ Save OLD_R0
321 .macro irq_restore_user_regs
322 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
324 ldr lr, [sp, #S_PC] @ Get PC
325 add sp, sp, #S_FRAME_SIZE
326 subs pc, lr, #4 @ return & move spsr_svc into cpsr
330 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
332 str lr, [r13] @ save caller lr in position 0 of saved stack
333 mrs lr, spsr @ get the spsr
334 str lr, [r13, #4] @ save spsr in position 1 of saved stack
335 mov r13, #MODE_SVC @ prepare SVC-Mode
337 msr spsr, r13 @ switch modes, make sure moves will execute
338 mov lr, pc @ capture return pc
339 movs pc, lr @ jump to next instruction & switch modes.
342 .macro get_irq_stack @ setup IRQ stack
343 ldr sp, IRQ_STACK_START
346 .macro get_fiq_stack @ setup FIQ stack
347 ldr sp, FIQ_STACK_START
354 .globl undefined_instruction
355 undefined_instruction:
358 bl do_undefined_instruction
361 .globl software_interrupt
365 bl do_software_interrupt
368 .globl prefetch_abort
388 #ifdef CONFIG_USE_IRQ
395 irq_restore_user_regs
401 /* someone ought to write a more effiction fiq_save_user_regs */
404 irq_restore_user_regs