2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm-offsets.h>
22 *************************************************************************
26 *************************************************************************
32 ldr pc, _undefined_instruction
33 ldr pc, _software_interrupt
34 ldr pc, _prefetch_abort
40 _undefined_instruction:
41 .word undefined_instruction
43 .word software_interrupt
55 .balignl 16,0xdeadbeef
58 *************************************************************************
60 * Startup Code (reset vector)
62 * do important init only if we don't start from memory!
63 * setup memory and board specific bits prior to relocation.
64 * relocate armboot to ram
67 *************************************************************************
72 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
73 .word CONFIG_SPL_TEXT_BASE
75 .word CONFIG_SYS_TEXT_BASE
79 * These are defined in the board-specific linker script.
80 * Subtracting _start from them lets the linker put their
81 * relative position in the executable instead of leaving
86 .word __bss_start - _start
90 .word __bss_end - _start
97 /* IRQ stack memory (calculated at run-time) */
98 .globl IRQ_STACK_START
102 /* IRQ stack memory (calculated at run-time) */
103 .globl FIQ_STACK_START
108 /* IRQ stack memory (calculated at run-time) + 8 bytes */
109 .globl IRQ_STACK_START_IN
114 * the actual reset code
119 * set the cpu to SVC32 mode
127 * we do sys-critical inits only at reboot,
128 * not when booting from ram!
130 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
136 /*------------------------------------------------------------------------------*/
138 .globl c_runtime_cpu_setup
144 *************************************************************************
146 * CPU_init_critical registers
148 * setup important registers
149 * setup memory timing
151 *************************************************************************
154 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
156 /* arm_int_generic assumes the ARM boot monitor, or user software,
157 * has initialized the platform
159 mov pc, lr /* back to my caller */
162 *************************************************************************
166 *************************************************************************
172 #define S_FRAME_SIZE 72
194 #define MODE_SVC 0x13
198 * use bad_save_user_regs for abort/prefetch/undef/swi ...
199 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
202 .macro bad_save_user_regs
203 @ carve out a frame on current user stack
204 sub sp, sp, #S_FRAME_SIZE
205 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
207 ldr r2, IRQ_STACK_START_IN
208 @ get values for "aborted" pc and cpsr (into parm regs)
210 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
213 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
214 mov r0, sp @ save current stack into r0 (param register)
217 .macro irq_save_user_regs
218 sub sp, sp, #S_FRAME_SIZE
219 stmia sp, {r0 - r12} @ Calling r0-r12
220 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
222 stmdb r8, {sp, lr}^ @ Calling SP, LR
223 str lr, [r8, #0] @ Save calling PC
225 str r6, [r8, #4] @ Save CPSR
226 str r0, [r8, #8] @ Save OLD_R0
230 .macro irq_restore_user_regs
231 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
233 ldr lr, [sp, #S_PC] @ Get PC
234 add sp, sp, #S_FRAME_SIZE
235 subs pc, lr, #4 @ return & move spsr_svc into cpsr
239 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
241 str lr, [r13] @ save caller lr in position 0 of saved stack
242 mrs lr, spsr @ get the spsr
243 str lr, [r13, #4] @ save spsr in position 1 of saved stack
244 mov r13, #MODE_SVC @ prepare SVC-Mode
246 msr spsr, r13 @ switch modes, make sure moves will execute
247 mov lr, pc @ capture return pc
248 movs pc, lr @ jump to next instruction & switch modes.
251 .macro get_irq_stack @ setup IRQ stack
252 ldr sp, IRQ_STACK_START
255 .macro get_fiq_stack @ setup FIQ stack
256 ldr sp, FIQ_STACK_START
263 .globl undefined_instruction
264 undefined_instruction:
267 bl do_undefined_instruction
270 .globl software_interrupt
274 bl do_software_interrupt
277 .globl prefetch_abort
297 #ifdef CONFIG_USE_IRQ
304 irq_restore_user_regs
310 /* someone ought to write a more effiction fiq_save_user_regs */
313 irq_restore_user_regs