4 * System information functions
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/sys_proto.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/clock.h>
20 #include <power/tps65910.h>
22 struct ctrl_stat *cstat = (struct ctrl_stat *)CTRL_BASE;
25 * get_cpu_rev(void) - extract rev info
32 id = readl(DEVICE_ID);
33 rev = (id >> 28) & 0xff;
39 * get_cpu_type(void) - extract cpu info
41 u32 get_cpu_type(void)
46 id = readl(DEVICE_ID);
47 partnum = (id >> 12) & 0xffff;
53 * get_board_rev() - setup to pass kernel board revision information
54 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
56 u32 get_board_rev(void)
62 * get_device_type(): tell if GP/HS/EMU/TST
64 u32 get_device_type(void)
67 mode = readl(&cstat->statusreg) & (DEVICE_MASK);
72 * get_sysboot_value(void) - return SYS_BOOT[4:0]
74 u32 get_sysboot_value(void)
77 mode = readl(&cstat->statusreg) & (SYSBOOT_MASK);
81 #ifdef CONFIG_DISPLAY_CPUINFO
83 * Print CPU information
85 int print_cpuinfo(void)
89 switch (get_cpu_type()) {
97 cpu_s = "Unknown cpu type";
101 switch (get_device_type()) {
118 printf("%s-%s rev %d\n", cpu_s, sec_s, get_cpu_rev());
122 #endif /* CONFIG_DISPLAY_CPUINFO */
125 int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)
129 sil_rev = readl(&cdev->deviceid) >> 28;
132 /* PG 2.0, efuse may not be set. */
134 else if (sil_rev >= 2) {
135 /* Check what the efuse says our max speed is. */
136 int efuse_arm_mpu_max_freq;
137 efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma);
138 switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) {
139 case AM335X_ZCZ_1000:
140 return MPUPLL_M_1000;
154 /* PG 1.0 or otherwise unknown, use the PG1.0 max */
158 int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)
160 /* For PG2.1 and later, we have one set of values. */
164 return TPS65910_OP_REG_SEL_1_3_2_5;
166 return TPS65910_OP_REG_SEL_1_2_6;
168 return TPS65910_OP_REG_SEL_1_2_0;
171 return TPS65910_OP_REG_SEL_1_1_3;
175 /* Default to PG1.0/PG2.0 values. */
176 return TPS65910_OP_REG_SEL_1_1_3;