2 * Clock initialization routines
4 * Copyright (c) 2011 The Chromium OS Authors.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __EXYNOS_CLOCK_INIT_H
10 #define __EXYNOS_CLOCK_INIT_H
13 #ifdef CONFIG_EXYNOS5420
14 MEM_TIMINGS_MSR_COUNT = 5,
16 MEM_TIMINGS_MSR_COUNT = 4,
20 /* These are the ratio's for configuring ARM clock */
21 struct arm_clk_ratios {
22 unsigned arm_freq_mhz; /* Frequency of ARM core in MHz */
30 unsigned pclk_dbg_ratio;
32 unsigned periph_ratio;
38 /* These are the memory timings for a particular memory type and speed */
40 enum mem_manuf mem_manuf; /* Memory manufacturer */
41 enum ddr_mode mem_type; /* Memory type */
42 unsigned frequency_mhz; /* Frequency of memory in MHz */
44 /* Here follow the timing parameters for the selected memory */
81 unsigned pclk_cdrex_ratio;
82 unsigned direct_cmd_msr[MEM_TIMINGS_MSR_COUNT];
87 unsigned timing_power;
89 /* DQS, DQ, DEBUG offsets */
96 unsigned phy0_pulld_dqs;
97 unsigned phy1_pulld_dqs;
99 unsigned lpddr3_ctrl_phy_reset;
100 unsigned ctrl_start_point;
103 unsigned ctrl_dll_on;
108 unsigned ctrl_bstlen;
112 unsigned dfi_init_start;
117 unsigned zq_mode_dds;
118 unsigned zq_mode_term;
119 unsigned zq_mode_noterm; /* 1 to allow termination disable */
124 unsigned membaseconfig0;
125 unsigned membaseconfig1;
126 unsigned prechconfig_tp_cnt;
130 /* Channel and Chip Selection */
131 uint8_t dmc_channels; /* number of memory channels */
132 uint8_t chips_per_channel; /* number of chips per channel */
133 uint8_t chips_to_configure; /* number of chips to configure */
134 uint8_t send_zq_init; /* 1 to send this command */
135 unsigned impedance; /* drive strength impedeance */
136 uint8_t gate_leveling_enable; /* check gate leveling is enabled */
137 uint8_t read_leveling_enable; /* check h/w read leveling is enabled */
141 * Get the correct memory timings for our selected memory type and speed.
143 * This function can be called from SPL or the main U-Boot.
145 * @return pointer to the memory timings that we should use
147 struct mem_timings *clock_get_mem_timings(void);
150 * Initialize clock for the device
152 void system_clock_init(void);
155 * Set clock divisor value for booting from EMMC.
157 void emmc_boot_clk_div_set(void);