2 * Lowlevel setup for EXYNOS5 based board
4 * Copyright (C) 2013 Samsung Electronics
5 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/arch/cpu.h>
29 #include <asm/arch/dmc.h>
30 #include <asm/arch/power.h>
31 #include <asm/arch/tzpc.h>
32 #include <asm/arch/periph.h>
33 #include <asm/arch/pinmux.h>
34 #include <asm/arch/system.h>
35 #include "common_setup.h"
36 #include "exynos5_setup.h"
38 /* These are the things we can do during low-level init */
42 DO_MEM_RESET = 1 << 2,
47 #ifdef CONFIG_EXYNOS5420
49 * Pointer to this function is stored in iRam which is used
50 * for jump and power down of a specific core.
52 static void power_down_core(void)
54 uint32_t tmp, core_id, core_config;
56 /* Get the unique core id */
58 * Multiprocessor Affinity Register
64 core_id = (core_id >> 6) & ~3;
68 /* Set the status of the core to low */
69 core_config = (core_id * CPU_CONFIG_STATUS_OFFSET);
70 core_config += EXYNOS5420_CPU_CONFIG_BASE;
71 writel(0x0, core_config);
78 * Configurations for secondary cores are inapt at this stage.
79 * Reconfigure secondary cores. Shutdown and change the status
80 * of all cores except the primary core.
82 static void secondary_cores_configure(void)
86 /* Store jump address for power down of secondary cores */
87 writel((uint32_t)&power_down_core, CONFIG_PHY_IRAM_BASE + 0x4);
89 /* Need all core power down check */
94 * Power down all cores(secondary) while primary core must
95 * wait for all cores to go down.
97 for (core_id = 1; core_id != CONFIG_CORE_COUNT; core_id++) {
98 while ((readl(EXYNOS5420_CPU_STATUS_BASE
99 + (core_id * CPU_CONFIG_STATUS_OFFSET))
109 int do_lowlevel_init(void)
111 uint32_t reset_status;
116 #ifdef CONFIG_EXYNOS5420
117 /* Reconfigure secondary cores */
118 secondary_cores_configure();
121 reset_status = get_reset_status();
123 switch (reset_status) {
124 case S5P_CHECK_SLEEP:
125 actions = DO_CLOCKS | DO_WAKEUP;
127 case S5P_CHECK_DIDLE:
132 /* This is a normal boot (not a wake from sleep) */
133 actions = DO_CLOCKS | DO_MEM_RESET | DO_POWER;
136 if (actions & DO_POWER)
139 if (actions & DO_CLOCKS) {
141 mem_ctrl_init(actions & DO_MEM_RESET);
145 return actions & DO_WAKEUP;