2 * Copyright (C) 2012 Samsung Electronics
3 * Donghwa Lee <dh09.lee@samsung.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/power.h>
28 static void exynos4_mipi_phy_control(unsigned int dev_index,
31 struct exynos4_power *pmu =
32 (struct exynos4_power *)samsung_get_base_power();
33 unsigned int addr, cfg = 0;
36 addr = (unsigned int)&pmu->mipi_phy0_control;
38 addr = (unsigned int)&pmu->mipi_phy1_control;
43 cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
45 cfg &= ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
50 void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
53 exynos4_mipi_phy_control(dev_index, enable);
56 void exynos5_set_usbhost_phy_ctrl(unsigned int enable)
58 struct exynos5_power *power =
59 (struct exynos5_power *)samsung_get_base_power();
62 /* Enabling USBHOST_PHY */
63 setbits_le32(&power->usbhost_phy_control,
64 POWER_USB_HOST_PHY_CTRL_EN);
66 /* Disabling USBHOST_PHY */
67 clrbits_le32(&power->usbhost_phy_control,
68 POWER_USB_HOST_PHY_CTRL_EN);
72 void set_usbhost_phy_ctrl(unsigned int enable)
75 exynos5_set_usbhost_phy_ctrl(enable);
78 static void exynos5_dp_phy_control(unsigned int enable)
81 struct exynos5_power *power =
82 (struct exynos5_power *)samsung_get_base_power();
84 cfg = readl(&power->dptx_phy_control);
86 cfg |= EXYNOS_DP_PHY_ENABLE;
88 cfg &= ~EXYNOS_DP_PHY_ENABLE;
90 writel(cfg, &power->dptx_phy_control);
93 void set_dp_phy_ctrl(unsigned int enable)
96 exynos5_dp_phy_control(enable);
99 static void exynos5_set_ps_hold_ctrl(void)
101 struct exynos5_power *power =
102 (struct exynos5_power *)samsung_get_base_power();
104 /* Set PS-Hold high */
105 setbits_le32(&power->ps_hold_control,
106 EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
109 void set_ps_hold_ctrl(void)
111 if (cpu_is_exynos5())
112 exynos5_set_ps_hold_ctrl();