2 * Copyright (C) 2012 Samsung Electronics
3 * Donghwa Lee <dh09.lee@samsung.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/power.h>
12 static void exynos4_mipi_phy_control(unsigned int dev_index,
15 struct exynos4_power *pmu =
16 (struct exynos4_power *)samsung_get_base_power();
17 unsigned int addr, cfg = 0;
20 addr = (unsigned int)&pmu->mipi_phy0_control;
22 addr = (unsigned int)&pmu->mipi_phy1_control;
27 cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
29 cfg &= ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
34 void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
37 exynos4_mipi_phy_control(dev_index, enable);
40 void exynos5_set_usbhost_phy_ctrl(unsigned int enable)
42 struct exynos5_power *power =
43 (struct exynos5_power *)samsung_get_base_power();
46 /* Enabling USBHOST_PHY */
47 setbits_le32(&power->usbhost_phy_control,
48 POWER_USB_HOST_PHY_CTRL_EN);
50 /* Disabling USBHOST_PHY */
51 clrbits_le32(&power->usbhost_phy_control,
52 POWER_USB_HOST_PHY_CTRL_EN);
56 void set_usbhost_phy_ctrl(unsigned int enable)
59 exynos5_set_usbhost_phy_ctrl(enable);
62 static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)
64 struct exynos5_power *power =
65 (struct exynos5_power *)samsung_get_base_power();
68 /* Enabling USBDRD_PHY */
69 setbits_le32(&power->usbdrd_phy_control,
70 POWER_USB_DRD_PHY_CTRL_EN);
72 /* Disabling USBDRD_PHY */
73 clrbits_le32(&power->usbdrd_phy_control,
74 POWER_USB_DRD_PHY_CTRL_EN);
78 void set_usbdrd_phy_ctrl(unsigned int enable)
81 exynos5_set_usbdrd_phy_ctrl(enable);
84 static void exynos5_dp_phy_control(unsigned int enable)
87 struct exynos5_power *power =
88 (struct exynos5_power *)samsung_get_base_power();
90 cfg = readl(&power->dptx_phy_control);
92 cfg |= EXYNOS_DP_PHY_ENABLE;
94 cfg &= ~EXYNOS_DP_PHY_ENABLE;
96 writel(cfg, &power->dptx_phy_control);
99 void set_dp_phy_ctrl(unsigned int enable)
101 if (cpu_is_exynos5())
102 exynos5_dp_phy_control(enable);
105 static void exynos5_set_ps_hold_ctrl(void)
107 struct exynos5_power *power =
108 (struct exynos5_power *)samsung_get_base_power();
110 /* Set PS-Hold high */
111 setbits_le32(&power->ps_hold_control,
112 EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
115 void set_ps_hold_ctrl(void)
117 if (cpu_is_exynos5())
118 exynos5_set_ps_hold_ctrl();
122 static void exynos5_set_xclkout(void)
124 struct exynos5_power *power =
125 (struct exynos5_power *)samsung_get_base_power();
127 /* use xxti for xclk out */
128 clrsetbits_le32(&power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
132 void set_xclkout(void)
134 if (cpu_is_exynos5())
135 exynos5_set_xclkout();
138 /* Enables hardware tripping to power off the system when TMU fails */
139 void set_hw_thermal_trip(void)
141 if (cpu_is_exynos5()) {
142 struct exynos5_power *power =
143 (struct exynos5_power *)samsung_get_base_power();
145 /* PS_HOLD_CONTROL register ENABLE_HW_TRIP bit*/
146 setbits_le32(&power->ps_hold_control, POWER_ENABLE_HW_TRIP);
150 static uint32_t exynos5_get_reset_status(void)
152 struct exynos5_power *power =
153 (struct exynos5_power *)samsung_get_base_power();
155 return power->inform1;
158 static uint32_t exynos4_get_reset_status(void)
160 struct exynos4_power *power =
161 (struct exynos4_power *)samsung_get_base_power();
163 return power->inform1;
166 uint32_t get_reset_status(void)
168 if (cpu_is_exynos5())
169 return exynos5_get_reset_status();
171 return exynos4_get_reset_status();
174 static void exynos5_power_exit_wakeup(void)
176 struct exynos5_power *power =
177 (struct exynos5_power *)samsung_get_base_power();
178 typedef void (*resume_func)(void);
180 ((resume_func)power->inform0)();
183 static void exynos4_power_exit_wakeup(void)
185 struct exynos4_power *power =
186 (struct exynos4_power *)samsung_get_base_power();
187 typedef void (*resume_func)(void);
189 ((resume_func)power->inform0)();
192 void power_exit_wakeup(void)
194 if (cpu_is_exynos5())
195 exynos5_power_exit_wakeup();
197 exynos4_power_exit_wakeup();