2 * Keystone2: Architecture initialization
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/clock.h>
14 #include <asm/arch/hardware.h>
16 void chip_configuration_unlock(void)
18 __raw_writel(KS2_KICK0_MAGIC, KS2_KICK0);
19 __raw_writel(KS2_KICK1_MAGIC, KS2_KICK1);
22 int arch_cpu_init(void)
24 chip_configuration_unlock();
27 #ifdef CONFIG_SOC_K2HK
28 share_all_segments(8);
29 share_all_segments(9);
30 share_all_segments(10); /* QM PDSP */
31 share_all_segments(11); /* PCIE */
35 * just initialise the COM2 port so that TI specific
36 * UART register PWREMU_MGMT is initialized. Linux UART
37 * driver doesn't handle this.
39 NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM2),
40 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
45 void reset_cpu(ulong addr)
47 volatile u32 *rstctrl = (volatile u32 *)(KS2_RSTCTRL);
50 tmp = *rstctrl & KS2_RSTCTRL_MASK;
51 *rstctrl = tmp | KS2_RSTCTRL_KEY;
53 *rstctrl &= KS2_RSTCTRL_SWRST;
59 void enable_caches(void)
61 #ifndef CONFIG_SYS_DCACHE_OFF
62 /* Enable D-cache. I-cache is already enabled in start.S */