1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014 Freescale Semiconductor, Inc.
8 #include <asm/arch/immap_ls102xa.h>
9 #include <asm/arch/clock.h>
12 DECLARE_GLOBAL_DATA_PTR;
14 #ifndef CONFIG_SYS_FSL_NUM_CC_PLLS
15 #define CONFIG_SYS_FSL_NUM_CC_PLLS 2
18 void get_sys_info(struct sys_info *sys_info)
20 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
21 struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR);
23 const u8 core_cplx_pll[6] = {
24 [0] = 0, /* CC1 PPL / 1 */
25 [1] = 0, /* CC1 PPL / 2 */
26 [4] = 1, /* CC2 PPL / 1 */
27 [5] = 1, /* CC2 PPL / 2 */
30 const u8 core_cplx_pll_div[6] = {
31 [0] = 1, /* CC1 PPL / 1 */
32 [1] = 2, /* CC1 PPL / 2 */
33 [4] = 1, /* CC2 PPL / 1 */
34 [5] = 2, /* CC2 PPL / 2 */
38 uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
39 uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
40 unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
42 sys_info->freq_systembus = sysclk;
43 #ifdef CONFIG_DDR_CLK_FREQ
44 sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
46 sys_info->freq_ddrbus = sysclk;
49 sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >>
50 RCWSR0_SYS_PLL_RAT_SHIFT) & RCWSR0_SYS_PLL_RAT_MASK;
51 sys_info->freq_ddrbus *= (in_be32(&gur->rcwsr[0]) >>
52 RCWSR0_MEM_PLL_RAT_SHIFT) & RCWSR0_MEM_PLL_RAT_MASK;
54 for (i = 0; i < CONFIG_SYS_FSL_NUM_CC_PLLS; i++) {
55 ratio[i] = (in_be32(&clk->pllcgsr[i].pllcngsr) >> 1) & 0x3f;
57 freq_c_pll[i] = sysclk * ratio[i];
59 freq_c_pll[i] = sys_info->freq_systembus * ratio[i];
62 for (cpu = 0; cpu < CONFIG_MAX_CPUS; cpu++) {
63 u32 c_pll_sel = (in_be32(&clk->clkcsr[cpu].clkcncsr) >> 27)
65 u32 cplx_pll = core_cplx_pll[c_pll_sel];
67 sys_info->freq_processor[cpu] =
68 freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
71 #if defined(CONFIG_FSL_IFC)
72 sys_info->freq_localbus = sys_info->freq_systembus;
78 struct sys_info sys_info;
80 get_sys_info(&sys_info);
81 gd->cpu_clk = sys_info.freq_processor[0];
82 gd->bus_clk = sys_info.freq_systembus;
83 gd->mem_clk = sys_info.freq_ddrbus * 2;
85 #if defined(CONFIG_FSL_ESDHC)
86 gd->arch.sdhc_clk = gd->bus_clk;
92 ulong get_bus_freq(ulong dummy)
97 ulong get_ddr_freq(ulong dummy)
102 int get_serial_clock(void)
104 return gd->bus_clk / 2;
107 unsigned int mxc_get_clock(enum mxc_clock clk)
111 return get_bus_freq(0) / 2;
113 return get_bus_freq(0);
115 return get_bus_freq(0) / 2;
117 return get_bus_freq(0) / 2;
119 printf("Unsupported clock\n");