2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/types.h>
12 #define FSL_STRIDE_4B 4
13 #define FSL_STRIDE_8B 8
16 #define EPU_BLOCK_OFFSET 0x00000000
18 /* EPGCR (Event Processor Global Control Register) */
21 /* EPEVTCR0-9 (Event Processor EVT Pin Control Registers) */
22 #define EPEVTCR0 0x050
23 #define EPEVTCR9 0x074
24 #define EPEVTCR_STRIDE FSL_STRIDE_4B
26 /* EPXTRIGCR (Event Processor Crosstrigger Control Register) */
27 #define EPXTRIGCR 0x090
29 /* EPIMCR0-31 (Event Processor Input Mux Control Registers) */
31 #define EPIMCR31 0x17C
32 #define EPIMCR_STRIDE FSL_STRIDE_4B
34 /* EPSMCR0-15 (Event Processor SCU Mux Control Registers) */
36 #define EPSMCR15 0x278
37 #define EPSMCR_STRIDE FSL_STRIDE_8B
39 /* EPECR0-15 (Event Processor Event Control Registers) */
42 #define EPECR_STRIDE FSL_STRIDE_4B
44 /* EPACR0-15 (Event Processor Action Control Registers) */
47 #define EPACR_STRIDE FSL_STRIDE_4B
49 /* EPCCRi0-15 (Event Processor Counter Control Registers) */
53 #define EPCCR_STRIDE FSL_STRIDE_4B
55 /* EPCMPR0-15 (Event Processor Counter Compare Registers) */
57 #define EPCMPR15 0x93C
58 #define EPCMPR31 0x97C
59 #define EPCMPR_STRIDE FSL_STRIDE_4B
61 /* EPCTR0-31 (Event Processor Counter Register) */
64 #define EPCTR_STRIDE FSL_STRIDE_4B
66 void fsl_epu_clean(void *epu_base);