2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/immap_ls102xa.h>
12 /* port register default value */
13 #define AHCI_PORT_PHY_1_CFG 0xa003fffe
14 #define AHCI_PORT_PHY_2_CFG 0x28183411
15 #define AHCI_PORT_PHY_3_CFG 0x0e081004
16 #define AHCI_PORT_PHY_4_CFG 0x00480811
17 #define AHCI_PORT_PHY_5_CFG 0x192c96a4
18 #define AHCI_PORT_TRANS_CFG 0x08000025
20 #define SATA_ECC_REG_ADDR 0x20220520
21 #define SATA_ECC_DISABLE 0x00020000
23 int ls1021a_sata_init(void)
25 struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR;
27 #ifdef CONFIG_SYS_FSL_ERRATUM_A008407
28 out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE);
31 out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
32 out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
33 out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
34 out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG);
35 out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG);
36 out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
38 ahci_init((void __iomem *)AHCI_BASE_ADDR);