2 * (C) Copyright 2009 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/imx-regs.h>
26 #include <asm/arch/mx5x_pins.h>
27 #include <asm/arch/iomux.h>
28 #include <asm/arch/sys_proto.h>
30 /* IOMUX register (base) addresses */
32 IOMUXGPR0 = IOMUXC_BASE_ADDR,
33 IOMUXGPR1 = IOMUXC_BASE_ADDR + 0x004,
34 IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR,
35 IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + MUX_I_END,
36 IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + PAD_I_START,
37 IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + INPUT_CTL_START,
40 #define MUX_PIN_NUM_MAX (((MUX_I_END - MUX_I_START) >> 2) + 1)
42 /* Get the iomux register address of this pin */
43 static inline u32 get_mux_reg(iomux_pin_name_t pin)
45 u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
47 #if defined(CONFIG_MX51)
48 if (is_soc_rev(CHIP_REV_2_0) < 0) {
50 * Fixup register address:
51 * i.MX51 TO1 has offset with the register
52 * which is define as TO2.
54 if ((pin == MX51_PIN_NANDF_RB5) ||
55 (pin == MX51_PIN_NANDF_RB6) ||
56 (pin == MX51_PIN_NANDF_RB7))
58 else if (mux_reg >= 0x2FC)
60 else if (mux_reg >= 0x130)
64 mux_reg += IOMUXSW_MUX_CTL;
68 /* Get the pad register address of this pin */
69 static inline u32 get_pad_reg(iomux_pin_name_t pin)
71 u32 pad_reg = PIN_TO_IOMUX_PAD(pin);
73 #if defined(CONFIG_MX51)
74 if (is_soc_rev(CHIP_REV_2_0) < 0) {
76 * Fixup register address:
77 * i.MX51 TO1 has offset with the register
78 * which is define as TO2.
80 if ((pin == MX51_PIN_NANDF_RB5) ||
81 (pin == MX51_PIN_NANDF_RB6) ||
82 (pin == MX51_PIN_NANDF_RB7))
84 else if (pad_reg == 0x4D0 - PAD_I_START)
86 else if (pad_reg == 0x860 - PAD_I_START)
88 else if (pad_reg >= 0x804 - PAD_I_START)
90 else if (pad_reg >= 0x7FC - PAD_I_START)
92 else if (pad_reg >= 0x4E4 - PAD_I_START)
98 pad_reg += IOMUXSW_PAD_CTL;
102 /* Get the last iomux register address */
103 static inline u32 get_mux_end(void)
105 #if defined(CONFIG_MX51)
106 if (is_soc_rev(CHIP_REV_2_0) < 0)
107 return IOMUXC_BASE_ADDR + (0x3F8 - 4);
109 return IOMUXC_BASE_ADDR + (0x3F0 - 4);
111 return IOMUXSW_MUX_END;
115 * This function is used to configure a pin through the IOMUX module.
116 * @param pin a pin number as defined in iomux_pin_name_t
117 * @param cfg an output function as defined in iomux_pin_cfg_t
119 * @return 0 if successful; Non-zero otherwise
121 static void iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
123 u32 mux_reg = get_mux_reg(pin);
125 if ((mux_reg > get_mux_end()) || (mux_reg < IOMUXSW_MUX_CTL))
127 if (cfg == IOMUX_CONFIG_GPIO)
128 writel(PIN_TO_ALT_GPIO(pin), mux_reg);
130 writel(cfg, mux_reg);
134 * Request ownership for an IO pin. This function has to be the first one
135 * being called before that pin is used. The caller has to check the
136 * return value to make sure it returns 0.
138 * @param pin a name defined by iomux_pin_name_t
139 * @param cfg an input function as defined in iomux_pin_cfg_t
142 void mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
144 iomux_config_mux(pin, cfg);
148 * Release ownership for an IO pin
150 * @param pin a name defined by iomux_pin_name_t
151 * @param cfg an input function as defined in iomux_pin_cfg_t
153 void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
158 * This function configures the pad value for a IOMUX pin.
160 * @param pin a pin number as defined in iomux_pin_name_t
161 * @param config the ORed value of elements defined in iomux_pad_config_t
163 void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config)
165 u32 pad_reg = get_pad_reg(pin);
166 writel(config, pad_reg);
169 unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin)
171 u32 pad_reg = get_pad_reg(pin);
172 return readl(pad_reg);
176 * This function configures daisy-chain
178 * @param input index of input select register
179 * @param config the binary value of elements
181 void mxc_iomux_set_input(iomux_input_select_t input, u32 config)
183 u32 reg = IOMUXSW_INPUT_CTL + (input << 2);