2 * Voltage Controller implementation for OMAP
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <asm/omap_common.h>
19 #include <asm/arch/sys_proto.h>
22 * Define Master code if there are multiple masters on the I2C_SR bus.
23 * Normally not required
25 #ifndef CONFIG_OMAP_VC_I2C_HS_MCODE
26 #define CONFIG_OMAP_VC_I2C_HS_MCODE 0x0
29 /* Register defines and masks for VC IP Block */
30 /* PRM_VC_CFG_I2C_MODE */
31 #define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT (0x1 << 6)
32 #define PRM_VC_CFG_I2C_MODE_SRMODEEN_BIT (0x1 << 4)
33 #define PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT (0x1 << 3)
34 #define PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT 0x0
35 #define PRM_VC_CFG_I2C_MODE_HSMCODE_MASK 0x3
37 /* PRM_VC_CFG_I2C_CLK */
38 #define PRM_VC_CFG_I2C_CLK_HSCLL_SHIFT 24
39 #define PRM_VC_CFG_I2C_CLK_HSCLL_MASK 0xFF
40 #define PRM_VC_CFG_I2C_CLK_HSCLH_SHIFT 16
41 #define PRM_VC_CFG_I2C_CLK_HSCLH_MASK 0xFF
42 #define PRM_VC_CFG_I2C_CLK_SCLH_SHIFT 0
43 #define PRM_VC_CFG_I2C_CLK_SCLH_MASK 0xFF
44 #define PRM_VC_CFG_I2C_CLK_SCLL_SHIFT 8
45 #define PRM_VC_CFG_I2C_CLK_SCLL_MASK (0xFF << 8)
47 /* PRM_VC_VAL_BYPASS */
48 #define PRM_VC_VAL_BYPASS_VALID_BIT (0x1 << 24)
49 #define PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT 0
50 #define PRM_VC_VAL_BYPASS_SLAVEADDR_MASK 0x7F
51 #define PRM_VC_VAL_BYPASS_REGADDR_SHIFT 8
52 #define PRM_VC_VAL_BYPASS_REGADDR_MASK 0xFF
53 #define PRM_VC_VAL_BYPASS_DATA_SHIFT 16
54 #define PRM_VC_VAL_BYPASS_DATA_MASK 0xFF
57 * omap_vc_init() - Initialization for Voltage controller
58 * @speed_khz: I2C buspeed in KHz
60 void omap_vc_init(u16 speed_khz)
63 u32 sys_clk_khz, cycles_hi, cycles_low;
65 sys_clk_khz = get_sys_clk_freq() / 1000;
67 if (speed_khz > 400) {
68 puts("higher speed requested - throttle to 400Khz\n");
73 * Setup the dedicated I2C controller for Voltage Control
74 * I2C clk - high period 40% low period 60%
77 cycles_hi = sys_clk_khz * 4 / speed_khz;
78 cycles_low = sys_clk_khz * 6 / speed_khz;
79 /* values to be set in register - less by 5 & 7 respectively */
82 val = (cycles_hi << PRM_VC_CFG_I2C_CLK_SCLH_SHIFT) |
83 (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT);
84 writel(val, (*prcm)->prm_vc_cfg_i2c_clk);
86 val = CONFIG_OMAP_VC_I2C_HS_MCODE <<
87 PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT;
88 /* No HS mode for now */
89 val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT;
90 writel(val, (*prcm)->prm_vc_cfg_i2c_mode);
94 * omap_vc_bypass_send_value() - Send a data using VC Bypass command
95 * @sa: 7 bit I2C slave address of the PMIC
96 * @reg_addr: I2C register address(8 bit) address in PMIC
97 * @reg_data: what 8 bit data to write
99 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data)
102 * Unfortunately we need to loop here instead of a defined time
103 * use arbitary large value
105 u32 timeout = 0xFFFF;
108 sa &= PRM_VC_VAL_BYPASS_SLAVEADDR_MASK;
109 reg_addr &= PRM_VC_VAL_BYPASS_REGADDR_MASK;
110 reg_data &= PRM_VC_VAL_BYPASS_DATA_MASK;
112 /* program VC to send data */
113 reg_val = sa << PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT |
114 reg_addr << PRM_VC_VAL_BYPASS_REGADDR_SHIFT |
115 reg_data << PRM_VC_VAL_BYPASS_DATA_SHIFT;
116 writel(reg_val, (*prcm)->prm_vc_val_bypass);
118 /* Signal VC to send data */
119 writel(reg_val | PRM_VC_VAL_BYPASS_VALID_BIT,
120 (*prcm)->prm_vc_val_bypass);
122 /* Wait on VC to complete transmission */
124 reg_val = readl((*prcm)->prm_vc_val_bypass) &
125 PRM_VC_VAL_BYPASS_VALID_BIT;
132 /* Optional: cleanup PRM_IRQSTATUS_Ax */
133 /* In case we can do something about it in future.. */