3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/mem.h>
31 #include <asm/arch/sys_proto.h>
35 * Only One NAND allowed on board at a time.
36 * The GPMC CS Base for the same
38 unsigned int boot_flash_base;
39 unsigned int boot_flash_off;
40 unsigned int boot_flash_sec;
41 unsigned int boot_flash_type;
42 volatile unsigned int boot_flash_env_addr;
44 struct gpmc *gpmc_cfg;
46 #if defined(CONFIG_CMD_NAND)
47 static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
53 M_NAND_GPMC_CONFIG6, 0
56 #if defined(CONFIG_ENV_IS_IN_NAND)
64 #if defined(CONFIG_CMD_ONENAND)
65 static const u32 gpmc_onenand[GPMC_MAX_REG] = {
71 ONENAND_GPMC_CONFIG6, 0
74 #if defined(CONFIG_ENV_IS_IN_ONENAND)
82 /********************************************************
83 * mem_ok() - test used to see if timings are correct
84 * for a part. Helps in guessing which part
85 * we are currently using.
86 *******************************************************/
90 u32 pattern = 0x12345678;
92 addr = OMAP34XX_SDRC_CS0 + get_sdr_cs_offset(cs);
94 writel(0x0, addr + 0x400); /* clear pos A */
95 writel(pattern, addr); /* pattern to pos B */
96 writel(0x0, addr + 4); /* remove pattern off the bus */
97 val1 = readl(addr + 0x400); /* get pos A value */
98 val2 = readl(addr); /* get val2 */
100 if ((val1 != 0) || (val2 != pattern)) /* see if pos A val changed */
106 void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
109 writel(0, &cs->config7);
111 /* Delay for settling */
112 writel(gpmc_config[0], &cs->config1);
113 writel(gpmc_config[1], &cs->config2);
114 writel(gpmc_config[2], &cs->config3);
115 writel(gpmc_config[3], &cs->config4);
116 writel(gpmc_config[4], &cs->config5);
117 writel(gpmc_config[5], &cs->config6);
118 /* Enable the config */
119 writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
120 (1 << 6)), &cs->config7);
124 /*****************************************************
125 * gpmc_init(): init gpmc bus
126 * Init GPMC for x16, MuxMode (SDRAM in x32).
127 * This code can only be executed from SRAM or SDRAM.
128 *****************************************************/
131 /* putting a blanket check on GPMC based on ZeBu for now */
132 gpmc_cfg = (struct gpmc *)GPMC_BASE;
133 #if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND)
134 const u32 *gpmc_config = NULL;
137 #if defined(CONFIG_ENV_IS_IN_NAND) || defined(CONFIG_ENV_IS_IN_ONENAND)
138 u32 f_off = CONFIG_SYS_MONITOR_LEN;
144 /* global settings */
145 writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */
146 writel(0, &gpmc_cfg->timeout_control);/* timeout disable */
148 config = readl(&gpmc_cfg->config);
150 writel(config, &gpmc_cfg->config);
153 * Disable the GPMC0 config set by ROM code
154 * It conflicts with our MPDB (both at 0x08000000)
156 writel(0, &gpmc_cfg->cs[0].config7);
159 #if defined(CONFIG_CMD_NAND) /* CS 0 */
160 gpmc_config = gpmc_m_nand;
162 base = PISMO1_NAND_BASE;
163 size = PISMO1_NAND_SIZE;
164 enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
165 #if defined(CONFIG_ENV_IS_IN_NAND)
166 f_off = SMNAND_ENV_OFFSET;
167 f_sec = (128 << 10); /* 128 KiB */
169 boot_flash_base = base;
170 boot_flash_off = f_off;
171 boot_flash_sec = f_sec;
172 boot_flash_env_addr = f_off;
176 #if defined(CONFIG_CMD_ONENAND)
177 gpmc_config = gpmc_onenand;
178 base = PISMO1_ONEN_BASE;
179 size = PISMO1_ONEN_SIZE;
180 enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
181 #if defined(CONFIG_ENV_IS_IN_ONENAND)
182 f_off = ONENAND_ENV_OFFSET;
183 f_sec = (128 << 10); /* 128 KiB */
185 boot_flash_base = base;
186 boot_flash_off = f_off;
187 boot_flash_sec = f_sec;
188 boot_flash_env_addr = f_off;