3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/mem.h> /* get mem tables */
18 #include <asm/arch/sys_proto.h>
19 #include <asm/bootm.h>
22 #include <linux/compiler.h>
24 extern omap3_sysinfo sysinfo;
25 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
27 #ifdef CONFIG_DISPLAY_CPUINFO
28 static char *rev_s[CPU_3XX_MAX_REV] = {
38 /* this is the revision table for 37xx CPUs */
39 static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
43 #endif /* CONFIG_DISPLAY_CPUINFO */
45 /*****************************************************************
46 * get_dieid(u32 *id) - read die ID
47 *****************************************************************/
48 void get_dieid(u32 *id)
50 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
52 id[3] = readl(&id_base->die_id_0);
53 id[2] = readl(&id_base->die_id_1);
54 id[1] = readl(&id_base->die_id_2);
55 id[0] = readl(&id_base->die_id_3);
58 /*****************************************************************
59 * dieid_num_r(void) - read and set die ID
60 *****************************************************************/
61 void dieid_num_r(void)
63 char *uid_s, die_id[34];
66 memset(die_id, 0, sizeof(die_id));
68 uid_s = getenv("dieid#");
72 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
73 setenv("dieid#", die_id);
77 printf("Die ID #%s\n", uid_s);
80 /******************************************
81 * get_cpu_type(void) - extract cpu info
82 ******************************************/
83 u32 get_cpu_type(void)
85 return readl(&ctrl_base->ctrl_omap_stat);
88 /******************************************
89 * get_cpu_id(void) - extract cpu id
90 * returns 0 for ES1.0, cpuid otherwise
91 ******************************************/
94 struct ctrl_id *id_base;
98 * On ES1.0 the IDCODE register is not exposed on L4
99 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
101 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
102 if ((cpuid & 0xf) == 0x0) {
105 /* Decode the IDs on > ES1.0 */
106 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
108 cpuid = readl(&id_base->idcode);
114 /******************************************
115 * get_cpu_family(void) - extract cpu info
116 ******************************************/
117 u32 get_cpu_family(void)
121 u32 cpuid = get_cpu_id();
126 hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
128 case HAWKEYE_OMAP34XX:
129 cpu_family = CPU_OMAP34XX;
132 cpu_family = CPU_AM35XX;
134 case HAWKEYE_OMAP36XX:
135 cpu_family = CPU_OMAP36XX;
138 cpu_family = CPU_OMAP34XX;
144 /******************************************
145 * get_cpu_rev(void) - extract version info
146 ******************************************/
147 u32 get_cpu_rev(void)
149 u32 cpuid = get_cpu_id();
154 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
157 /*****************************************************************
158 * get_sku_id(void) - read sku_id to get info on max clock rate
159 *****************************************************************/
162 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
163 return readl(&id_base->sku_id) & SKUID_CLK_MASK;
166 /***************************************************************************
167 * get_gpmc0_base() - Return current address hardware will be
168 * fetching from. The below effectively gives what is correct, its a bit
169 * mis-leading compared to the TRM. For the most general case the mask
170 * needs to be also taken into account this does work in practice.
171 * - for u-boot we currently map:
176 ****************************************************************************/
177 u32 get_gpmc0_base(void)
181 b = readl(&gpmc_cfg->cs[0].config7);
182 b &= 0x1F; /* keep base [5:0] */
183 b = b << 24; /* ret 0x0b000000 */
187 /*******************************************************************
188 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
189 *******************************************************************/
190 u32 get_gpmc0_width(void)
195 /*************************************************************************
196 * get_board_rev() - setup to pass kernel board revision information
197 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
198 *************************************************************************/
199 u32 __weak get_board_rev(void)
204 /********************************************************
205 * get_base(); get upper addr of current execution
206 *******************************************************/
207 static u32 get_base(void)
211 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
217 /********************************************************
218 * is_running_in_flash() - tell if currently running in
220 *******************************************************/
221 u32 is_running_in_flash(void)
224 return 1; /* in FLASH */
226 return 0; /* running in SRAM or SDRAM */
229 /********************************************************
230 * is_running_in_sram() - tell if currently running in
232 *******************************************************/
233 u32 is_running_in_sram(void)
236 return 1; /* in SRAM */
238 return 0; /* running in FLASH or SDRAM */
241 /********************************************************
242 * is_running_in_sdram() - tell if currently running in
244 *******************************************************/
245 u32 is_running_in_sdram(void)
248 return 1; /* in SDRAM */
250 return 0; /* running in SRAM or FLASH */
253 /***************************************************************
254 * get_boot_type() - Is this an XIP type device or a stream one
255 * bits 4-0 specify type. Bit 5 says mem/perif
256 ***************************************************************/
257 u32 get_boot_type(void)
259 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
262 /*************************************************************
263 * get_device_type(): tell if GP/HS/EMU/TST
264 *************************************************************/
265 u32 get_device_type(void)
267 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
270 #ifdef CONFIG_DISPLAY_CPUINFO
272 * Print CPU information
274 int print_cpuinfo (void)
276 char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
278 switch (get_cpu_family()) {
280 cpu_family_s = "OMAP";
281 switch (get_cpu_type()) {
298 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
299 (get_sku_id() == SKUID_CLK_720MHZ))
307 switch (get_cpu_type()) {
321 cpu_family_s = "OMAP";
322 switch (get_cpu_type()) {
333 cpu_family_s = "OMAP";
338 switch (get_device_type()) {
355 if (CPU_OMAP36XX == get_cpu_family())
356 printf("%s%s-%s ES%s, CPU-OPP2, L3-200MHz, Max CPU Clock %s\n",
357 cpu_family_s, cpu_s, sec_s,
358 rev_s_37xx[get_cpu_rev()], max_clk);
360 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
361 cpu_family_s, cpu_s, sec_s,
362 rev_s[get_cpu_rev()], max_clk);
366 #endif /* CONFIG_DISPLAY_CPUINFO */