3 * Common functions for OMAP4 based boards
6 * Texas Instruments, <www.ti.com>
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/armv7.h>
32 #include <asm/arch/cpu.h>
33 #include <asm/arch/sys_proto.h>
34 #include <asm/sizes.h>
35 #include <asm/arch/emif.h>
36 #include "omap4_mux_data.h"
38 DECLARE_GLOBAL_DATA_PTR;
40 u32 *const omap4_revision = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
42 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
45 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
47 for (i = 0; i < size; i++, pad++)
48 writew(pad->val, base + pad->offset);
51 static void set_muxconf_regs_essential(void)
53 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
54 sizeof(core_padconf_array_essential) /
55 sizeof(struct pad_conf_entry));
57 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
58 sizeof(wkup_padconf_array_essential) /
59 sizeof(struct pad_conf_entry));
62 static void set_mux_conf_regs(void)
64 switch (omap4_hw_init_context()) {
65 case OMAP_INIT_CONTEXT_SPL:
66 set_muxconf_regs_essential();
68 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
69 set_muxconf_regs_non_essential();
71 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
72 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
73 set_muxconf_regs_essential();
74 set_muxconf_regs_non_essential();
79 static u32 cortex_a9_rev(void)
84 /* Read Main ID Register (MIDR) */
85 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
90 static void init_omap4_revision(void)
93 * For some of the ES2/ES1 boards ID_CODE is not reliable:
94 * Also, ES1 and ES2 have different ARM revisions
95 * So use ARM revision for identification
97 unsigned int arm_rev = cortex_a9_rev();
100 case MIDR_CORTEX_A9_R0P1:
101 *omap4_revision = OMAP4430_ES1_0;
103 case MIDR_CORTEX_A9_R1P2:
104 switch (readl(CONTROL_ID_CODE)) {
105 case OMAP4_CONTROL_ID_CODE_ES2_0:
106 *omap4_revision = OMAP4430_ES2_0;
108 case OMAP4_CONTROL_ID_CODE_ES2_1:
109 *omap4_revision = OMAP4430_ES2_1;
111 case OMAP4_CONTROL_ID_CODE_ES2_2:
112 *omap4_revision = OMAP4430_ES2_2;
115 *omap4_revision = OMAP4430_ES2_0;
119 case MIDR_CORTEX_A9_R1P3:
120 *omap4_revision = OMAP4430_ES2_3;
123 *omap4_revision = OMAP4430_SILICON_ID_INVALID;
128 void omap_rev_string(char *omap4_rev_string)
130 u32 omap4_rev = omap_revision();
131 u32 omap4_variant = (omap4_rev & 0xFFFF0000) >> 16;
132 u32 major_rev = (omap4_rev & 0x00000F00) >> 8;
133 u32 minor_rev = (omap4_rev & 0x000000F0) >> 4;
135 sprintf(omap4_rev_string, "OMAP%x ES%x.%x", omap4_variant, major_rev,
141 * Description: Does early system init of watchdog, muxing, andclocks
142 * Watchdog disable is done always. For the rest what gets done
143 * depends on the boot mode in which this function is executed
144 * 1. s_init of SPL running from SRAM
145 * 2. s_init of U-Boot running from FLASH
146 * 3. s_init of U-Boot loaded to SDRAM by SPL
147 * 4. s_init of U-Boot loaded to SDRAM by ROM code using the
148 * Configuration Header feature
149 * Please have a look at the respective functions to see what gets
150 * done in each of these cases
151 * This function is called with SRAM stack.
155 init_omap4_revision();
162 * Routine: wait_for_command_complete
163 * Description: Wait for posting to finish on watchdog
165 void wait_for_command_complete(struct watchdog *wd_base)
169 pending = readl(&wd_base->wwps);
174 * Routine: watchdog_init
175 * Description: Shut down watch dogs
177 void watchdog_init(void)
179 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
181 writel(WD_UNLOCK1, &wd2_base->wspr);
182 wait_for_command_complete(wd2_base);
183 writel(WD_UNLOCK2, &wd2_base->wspr);
188 * This function finds the SDRAM size available in the system
189 * based on DMM section configurations
190 * This is needed because the size of memory installed may be
191 * different on different versions of the board
193 u32 omap4_sdram_size(void)
195 u32 section, i, total_size = 0, size, addr;
196 for (i = 0; i < 4; i++) {
197 section = __raw_readl(OMAP44XX_DMM_LISA_MAP_BASE + i*4);
198 addr = section & OMAP44XX_SYS_ADDR_MASK;
199 /* See if the address is valid */
200 if ((addr >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
201 (addr < OMAP44XX_DRAM_ADDR_SPACE_END)) {
202 size = ((section & OMAP44XX_SYS_SIZE_MASK) >>
203 OMAP44XX_SYS_SIZE_SHIFT);
215 * Description: sets uboots idea of sdram size
220 gd->ram_size = omap4_sdram_size();
226 * Print board information
230 puts(sysinfo.board_string);
235 * This function is called by start_armboot. You can reliably use static
236 * data. Any boot-time function that require static data should be
239 int arch_cpu_init(void)
244 #ifndef CONFIG_SYS_L2CACHE_OFF
245 void v7_outer_cache_enable(void)
247 set_pl310_ctrl_reg(1);
250 void v7_outer_cache_disable(void)
252 set_pl310_ctrl_reg(0);