2 * arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
3 * This file is lager low level initialize.
5 * Copyright (C) 2013, 2014 Renesas Electronics Corporation
7 * SPDX-License-Identifier: GPL-2.0
11 #include <linux/linkage.h>
14 mrc p15, 0, r4, c0, c0, 5 /* mpidr */
15 orr r4, r4, r4, lsr #6
16 and r4, r4, #7 /* id 0-3 = ca15.0,1,2,3 */
23 * CPU ID #1-#3 come here
27 ldr r1, =0xe6180000 /* sysc */
28 1: ldr r0, [r1, #0x20] /* sbar */
34 * Only CPU ID #0 comes here
38 ldr r2, =0xFF000044 /* PRR */
42 cmp r1, #0x4C /* 0x4C is ID of r8a7794 */
45 /* surpress wfe if ca15 */
47 mrceq p15, 0, r0, c1, c0, 1 /* actlr */
49 mcreq p15, 0, r0, c1, c0, 1
51 /* and set l2 latency */
52 mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */
55 tst r0, #1 /* only need for cluster 0 */
58 mrc p15, 1, r0, c9, c0, 2 /* r0 = L2CTLR */
60 cmp r1, #3 /* has already been set up */
62 orrne r0, r0, #0x83 /* L2CTLR[7:6] + L2CTLR[2:0] */
63 #if defined(CONFIG_R8A7790)
64 orrne r0, r0, #0x20 /* L2CTLR[5] */
66 mcrne p15, 1, r0, c9, c0, 2
70 _enable_actlr_smp: /* R8A7794 only (CA7) */
71 #ifndef CONFIG_DCACHE_OFF
72 mrc p15, 0, r0, c1, c0, 1
74 mcr p15, 0, r0, c1, c0, 1
78 ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
82 /* initialize system */
88 ENDPROC(lowlevel_init)