2 * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
4 * Based on allwinner u-boot sources rsb code which is:
5 * (C) Copyright 2007-2013
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * lixiang <lixiang@allwinnertech.com>
9 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/prcm.h>
17 #include <asm/arch/rsb.h>
19 static int rsb_set_device_mode(void);
21 static void rsb_cfg_io(void)
23 #ifdef CONFIG_MACH_SUN8I
24 sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL0_R_RSB_SCK);
25 sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL1_R_RSB_SDA);
26 sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
27 sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
28 sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
29 sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
30 #elif defined CONFIG_MACH_SUN9I
31 sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN0_R_RSB_SCK);
32 sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN1_R_RSB_SDA);
33 sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
34 sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
35 sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
36 sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
38 #error unsupported MACH_SUNXI
42 static void rsb_set_clk(void)
44 struct sunxi_rsb_reg * const rsb =
45 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
49 /* Source is Hosc24M, set RSB clk to 3Mhz */
50 div = 24000000 / 3000000 / 2 - 1;
55 writel((cd_odly << 8) | div, &rsb->ccr);
60 struct sunxi_rsb_reg * const rsb =
61 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
65 /* Enable RSB and PIO clk, and de-assert their resets */
66 prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
68 writel(RSB_CTRL_SOFT_RST, &rsb->ctrl);
71 return rsb_set_device_mode();
74 static int rsb_await_trans(void)
76 struct sunxi_rsb_reg * const rsb =
77 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
78 unsigned long tmo = timer_get_us() + 1000000;
83 stat = readl(&rsb->stat);
84 if (stat & RSB_STAT_LBSY_INT) {
88 if (stat & RSB_STAT_TERR_INT) {
92 if (stat & RSB_STAT_TOVER_INT) {
96 if (timer_get_us() > tmo) {
101 writel(stat, &rsb->stat); /* Clear status bits */
106 static int rsb_set_device_mode(void)
108 struct sunxi_rsb_reg * const rsb =
109 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
110 unsigned long tmo = timer_get_us() + 1000000;
112 writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA,
115 while (readl(&rsb->dmcr) & RSB_DMCR_DEVICE_MODE_START) {
116 if (timer_get_us() > tmo)
120 return rsb_await_trans();
123 static int rsb_do_trans(void)
125 struct sunxi_rsb_reg * const rsb =
126 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
128 setbits_le32(&rsb->ctrl, RSB_CTRL_START_TRANS);
129 return rsb_await_trans();
132 int rsb_set_device_address(u16 device_addr, u16 runtime_addr)
134 struct sunxi_rsb_reg * const rsb =
135 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
137 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr) |
138 RSB_DEVADDR_DEVICE_ADDR(device_addr), &rsb->devaddr);
139 writel(RSB_CMD_SET_RTSADDR, &rsb->cmd);
141 return rsb_do_trans();
144 int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data)
146 struct sunxi_rsb_reg * const rsb =
147 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
149 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_device_addr), &rsb->devaddr);
150 writel(reg_addr, &rsb->addr);
151 writel(data, &rsb->data);
152 writel(RSB_CMD_BYTE_WRITE, &rsb->cmd);
154 return rsb_do_trans();
157 int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data)
159 struct sunxi_rsb_reg * const rsb =
160 (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
163 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_device_addr), &rsb->devaddr);
164 writel(reg_addr, &rsb->addr);
165 writel(RSB_CMD_BYTE_READ, &rsb->cmd);
167 ret = rsb_do_trans();
171 *data = readl(&rsb->data) & 0xff;