2 * Copyright (C) 2009 ST-Ericsson SA
4 * Adapted from the Linux version:
5 * Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License version 2
22 * as published by the Free Software Foundation.
26 * NOTE: This currently does not support the I2C workaround access method.
32 #include <asm/arch/hardware.h>
33 #include <asm/types.h>
35 #include <asm/errno.h>
36 #include <asm/arch/prcmu.h>
38 /* CPU mailbox registers */
39 #define PRCMU_I2C_WRITE(slave) \
40 (((slave) << 1) | I2CWRITE | (1 << 6))
41 #define PRCMU_I2C_READ(slave) \
42 (((slave) << 1) | I2CREAD | (1 << 6))
44 #define I2C_MBOX_BIT (1 << 5)
46 static int prcmu_is_ready(void)
48 int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE;
50 printf("PRCMU firmware not ready\n");
54 static int wait_for_i2c_mbx_rdy(void)
58 if (readl(PRCM_ARM_IT1_VAL) & I2C_MBOX_BIT) {
59 printf("prcmu: warning i2c mailbox was not acked\n");
60 /* clear mailbox 5 ack irq */
61 writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
64 /* check any already on-going transaction */
65 while ((readl(PRCM_MBOX_CPU_VAL) & I2C_MBOX_BIT) && timeout)
74 static int wait_for_i2c_req_done(void)
78 /* Set an interrupt to XP70 */
79 writel(I2C_MBOX_BIT, PRCM_MBOX_CPU_SET);
81 /* wait for mailbox 5 (i2c) ack */
82 while (!(readl(PRCM_ARM_IT1_VAL) & I2C_MBOX_BIT) && timeout)
92 * prcmu_i2c_read - PRCMU - 4500 communication using PRCMU I2C
93 * @reg: - db8500 register bank to be accessed
94 * @slave: - db8500 register to be accessed
95 * Returns: ACK_MB5 value containing the status
97 int prcmu_i2c_read(u8 reg, u16 slave)
103 if (!prcmu_is_ready())
106 debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
109 ret = wait_for_i2c_mbx_rdy();
111 printf("prcmu_i2c_read: mailbox became not ready\n");
115 /* prepare the data for mailbox 5 */
116 writeb(PRCMU_I2C_READ(reg), PRCM_REQ_MB5_I2COPTYPE_REG);
117 writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
118 writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
119 writeb(0, PRCM_REQ_MB5_I2CVAL);
121 ret = wait_for_i2c_req_done();
123 printf("prcmu_i2c_read: mailbox request timed out\n");
127 /* retrieve values */
128 debug("ack-mb5:transfer status = %x\n",
129 readb(PRCM_ACK_MB5_STATUS));
130 debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
131 debug("ack-mb5:slave_add = %x\n",
132 readb(PRCM_ACK_MB5_SLAVE));
133 debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
135 i2c_status = readb(PRCM_ACK_MB5_STATUS);
136 i2c_val = readb(PRCM_ACK_MB5_VAL);
137 /* clear mailbox 5 ack irq */
138 writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
140 if (i2c_status == I2C_RD_OK)
143 printf("prcmu_i2c_read:read return status= %d\n", i2c_status);
148 * prcmu_i2c_write - PRCMU-db8500 communication using PRCMU I2C
149 * @reg: - db8500 register bank to be accessed
150 * @slave: - db800 register to be written to
151 * @reg_data: - the data to write
152 * Returns: ACK_MB5 value containing the status
154 int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
159 if (!prcmu_is_ready())
162 debug("\nprcmu_4500_i2c_write:bank=%x;reg=%x;\n",
165 ret = wait_for_i2c_mbx_rdy();
167 printf("prcmu_i2c_write: mailbox became not ready\n");
171 /* prepare the data for mailbox 5 */
172 writeb(PRCMU_I2C_WRITE(reg), PRCM_REQ_MB5_I2COPTYPE_REG);
173 writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
174 writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
175 writeb(reg_data, PRCM_REQ_MB5_I2CVAL);
177 ret = wait_for_i2c_req_done();
179 printf("prcmu_i2c_write: mailbox request timed out\n");
183 /* retrieve values */
184 debug("ack-mb5:transfer status = %x\n",
185 readb(PRCM_ACK_MB5_STATUS));
186 debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
187 debug("ack-mb5:slave_add = %x\n",
188 readb(PRCM_ACK_MB5_SLAVE));
189 debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
191 i2c_status = readb(PRCM_ACK_MB5_STATUS);
192 debug("\ni2c_status = %x\n", i2c_status);
193 /* clear mailbox 5 ack irq */
194 writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
196 if (i2c_status == I2C_WR_OK)
199 printf("%s: i2c_status : 0x%x\n", __func__, i2c_status);
203 void u8500_prcmu_enable(u32 *reg)
205 writel(readl(reg) | (1 << 8), reg);
208 void db8500_prcmu_init(void)
211 writel(1 << 17, PRCM_TCR);
213 u8500_prcmu_enable((u32 *)PRCM_PER1CLK_MGT_REG);
214 u8500_prcmu_enable((u32 *)PRCM_PER2CLK_MGT_REG);
215 u8500_prcmu_enable((u32 *)PRCM_PER3CLK_MGT_REG);
216 /* PER4CLK does not exist */
217 u8500_prcmu_enable((u32 *)PRCM_PER5CLK_MGT_REG);
218 u8500_prcmu_enable((u32 *)PRCM_PER6CLK_MGT_REG);
219 /* Only exists in ED but is always ok to write to */
220 u8500_prcmu_enable((u32 *)PRCM_PER7CLK_MGT_REG);
222 u8500_prcmu_enable((u32 *)PRCM_UARTCLK_MGT_REG);
223 u8500_prcmu_enable((u32 *)PRCM_I2CCLK_MGT_REG);
225 u8500_prcmu_enable((u32 *)PRCM_SDMMCCLK_MGT_REG);
227 /* Clean up the mailbox interrupts after pre-u-boot code. */
228 writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);