2 * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved.
6 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
9 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
11 * (C) Copyright 2002-2004
12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
15 * Texas Instruments <www.ti.com>
18 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
19 * Marius Groeger <mgroeger@sysgo.de>
22 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
23 * Alex Zuepke <azu@sysgo.de>
25 * SPDX-License-Identifier: GPL-2.0+
31 #include <asm/arch/hardware.h>
33 DECLARE_GLOBAL_DATA_PTR;
36 u32 load; /* Timer Load Register */
37 u32 counter; /* Timer Counter Register */
38 u32 control; /* Timer Control Register */
41 static struct scu_timer *timer_base =
42 (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR;
44 #define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */
45 #define SCUTIMER_CONTROL_PRESCALER_SHIFT 8
46 #define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */
47 #define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */
49 #define TIMER_LOAD_VAL 0xFFFFFFFF
50 #define TIMER_PRESCALE 255
51 #define TIMER_TICK_HZ (CONFIG_CPU_FREQ_HZ / 2 / TIMER_PRESCALE)
55 const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
56 (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) |
57 SCUTIMER_CONTROL_ENABLE_MASK;
59 /* Load the timer counter register */
60 writel(0xFFFFFFFF, &timer_base->load);
63 * Start the A9Timer device
64 * Enable Auto reload mode, Clear prescaler control bits
65 * Set prescaler value, Enable the decrementer
67 clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK,
71 gd->arch.lastinc = readl(&timer_base->counter) /
72 (TIMER_TICK_HZ / CONFIG_SYS_HZ);
79 * This function is derived from PowerPC code (read timebase as long long).
80 * On ARM it just returns the timer value.
82 ulong get_timer_masked(void)
86 now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ);
88 if (gd->arch.lastinc >= now) {
90 gd->arch.tbl += gd->arch.lastinc - now;
92 /* We have an overflow ... */
93 gd->arch.tbl += gd->arch.lastinc + TIMER_LOAD_VAL - now;
95 gd->arch.lastinc = now;
100 void __udelay(unsigned long usec)
110 countticks = (u32) (((unsigned long long) TIMER_TICK_HZ * usec) /
113 /* decrementing timer */
114 timeend = readl(&timer_base->counter) - countticks;
116 #if TIMER_LOAD_VAL != 0xFFFFFFFF
117 /* do not manage multiple overflow */
118 if (countticks >= TIMER_LOAD_VAL)
119 countticks = TIMER_LOAD_VAL - 1;
123 timenow = readl(&timer_base->counter);
125 if (timenow >= timeend) {
127 timediff = timenow - timeend;
129 if ((TIMER_LOAD_VAL - timeend + timenow) <=
132 timediff = TIMER_LOAD_VAL - timeend + timenow;
134 /* missed the exact match */
138 } while (timediff > 0);
141 /* Timer without interrupts */
142 ulong get_timer(ulong base)
144 return get_timer_masked() - base;
148 * This function is derived from PowerPC code (read timebase as long long).
149 * On ARM it just returns the timer value.
151 unsigned long long get_ticks(void)
157 * This function is derived from PowerPC code (timebase clock frequency).
158 * On ARM it returns the number of timer ticks per second.
160 ulong get_tbclk(void)
162 return CONFIG_SYS_HZ;