git.sur5r.net Git - u-boot/blob - arch/arm/cpu/armv8/fsl-layerscape/fdt.c

   1 /*
   2  * Copyright 2014-2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <libfdt.h>
   9 #include <fdt_support.h>
  10 #include <phy.h>
  11 #ifdef CONFIG_FSL_LSCH3
  12 #include <asm/arch/fdt.h>
  13 #endif
  14 #ifdef CONFIG_FSL_ESDHC
  15 #include <fsl_esdhc.h>
  16 #endif
  17 #ifdef CONFIG_SYS_DPAA_FMAN
  18 #include <fsl_fman.h>
  19 #endif
  20 #ifdef CONFIG_MP
  21 #include <asm/arch/mp.h>
  22 #endif
  23
  24 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
  25 {
  26         return fdt_setprop_string(blob, offset, "phy-connection-type",
  27                                          phy_string_for_interface(phyc));
  28 }
  29
  30 #ifdef CONFIG_MP
  31 void ft_fixup_cpu(void *blob)
  32 {
  33         int off;
  34         __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
  35         fdt32_t *reg;
  36         int addr_cells;
  37         u64 val, core_id;
  38         size_t *boot_code_size = &(__secondary_boot_code_size);
  39
  40         off = fdt_path_offset(blob, "/cpus");
  41         if (off < 0) {
  42                 puts("couldn't find /cpus node\n");
  43                 return;
  44         }
  45         of_bus_default_count_cells(blob, off, &addr_cells, NULL);
  46
  47         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  48         while (off != -FDT_ERR_NOTFOUND) {
  49                 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  50                 if (reg) {
  51                         core_id = of_read_number(reg, addr_cells);
  52                         if (core_id  == 0 || (is_core_online(core_id))) {
  53                                 val = spin_tbl_addr;
  54                                 val += id_to_core(core_id) *
  55                                        SPIN_TABLE_ELEM_SIZE;
  56                                 val = cpu_to_fdt64(val);
  57                                 fdt_setprop_string(blob, off, "enable-method",
  58                                                    "spin-table");
  59                                 fdt_setprop(blob, off, "cpu-release-addr",
  60                                             &val, sizeof(val));
  61                         } else {
  62                                 debug("skipping offline core\n");
  63                         }
  64                 } else {
  65                         puts("Warning: found cpu node without reg property\n");
  66                 }
  67                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
  68                                                     "cpu", 4);
  69         }
  70
  71         fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
  72                         *boot_code_size);
  73 }
  74 #endif
  75
  76 void ft_cpu_setup(void *blob, bd_t *bd)
  77 {
  78 #ifdef CONFIG_MP
  79         ft_fixup_cpu(blob);
  80 #endif
  81
  82 #ifdef CONFIG_SYS_NS16550
  83         do_fixup_by_compat_u32(blob, "fsl,ns16550",
  84                                "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
  85 #endif
  86
  87         do_fixup_by_compat_u32(blob, "fixed-clock",
  88                                "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
  89
  90 #ifdef CONFIG_PCI
  91         ft_pci_setup(blob, bd);
  92 #endif
  93
  94 #ifdef CONFIG_FSL_ESDHC
  95         fdt_fixup_esdhc(blob, bd);
  96 #endif
  97
  98 #ifdef CONFIG_SYS_DPAA_FMAN
  99         fdt_fixup_fman_firmware(blob);
 100 #endif
 101 }