git.sur5r.net Git - u-boot/blob - arch/arm/cpu/armv8/fsl-layerscape/fdt.c

   1 /*
   2  * Copyright 2014-2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <efi_loader.h>
   9 #include <libfdt.h>
  10 #include <fdt_support.h>
  11 #include <phy.h>
  12 #ifdef CONFIG_FSL_LSCH3
  13 #include <asm/arch/fdt.h>
  14 #endif
  15 #ifdef CONFIG_FSL_ESDHC
  16 #include <fsl_esdhc.h>
  17 #endif
  18 #ifdef CONFIG_SYS_DPAA_FMAN
  19 #include <fsl_fman.h>
  20 #endif
  21 #ifdef CONFIG_MP
  22 #include <asm/arch/mp.h>
  23 #endif
  24 #include <fsl_sec.h>
  25 #include <asm/arch-fsl-layerscape/soc.h>
  26 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
  27 #include <asm/armv8/sec_firmware.h>
  28 #endif
  29
  30 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
  31 {
  32         return fdt_setprop_string(blob, offset, "phy-connection-type",
  33                                          phy_string_for_interface(phyc));
  34 }
  35
  36 #ifdef CONFIG_MP
  37 void ft_fixup_cpu(void *blob)
  38 {
  39         int off;
  40         __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
  41         fdt32_t *reg;
  42         int addr_cells;
  43         u64 val, core_id;
  44         size_t *boot_code_size = &(__secondary_boot_code_size);
  45 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
  46         defined(CONFIG_FSL_PPA_ARMV8_PSCI)
  47         int node;
  48         u32 psci_ver;
  49
  50         /* Check the psci version to determine if the psci is supported */
  51         psci_ver = sec_firmware_support_psci_version();
  52         if (psci_ver == 0xffffffff) {
  53                 /* remove psci DT node */
  54                 node = fdt_path_offset(blob, "/psci");
  55                 if (node >= 0)
  56                         goto remove_psci_node;
  57
  58                 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
  59                 if (node >= 0)
  60                         goto remove_psci_node;
  61
  62                 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
  63                 if (node >= 0)
  64                         goto remove_psci_node;
  65
  66                 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
  67                 if (node >= 0)
  68                         goto remove_psci_node;
  69
  70 remove_psci_node:
  71                 if (node >= 0)
  72                         fdt_del_node(blob, node);
  73         } else {
  74                 return;
  75         }
  76 #endif
  77         off = fdt_path_offset(blob, "/cpus");
  78         if (off < 0) {
  79                 puts("couldn't find /cpus node\n");
  80                 return;
  81         }
  82         of_bus_default_count_cells(blob, off, &addr_cells, NULL);
  83
  84         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  85         while (off != -FDT_ERR_NOTFOUND) {
  86                 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  87                 if (reg) {
  88                         core_id = of_read_number(reg, addr_cells);
  89                         if (core_id  == 0 || (is_core_online(core_id))) {
  90                                 val = spin_tbl_addr;
  91                                 val += id_to_core(core_id) *
  92                                        SPIN_TABLE_ELEM_SIZE;
  93                                 val = cpu_to_fdt64(val);
  94                                 fdt_setprop_string(blob, off, "enable-method",
  95                                                    "spin-table");
  96                                 fdt_setprop(blob, off, "cpu-release-addr",
  97                                             &val, sizeof(val));
  98                         } else {
  99                                 debug("skipping offline core\n");
 100                         }
 101                 } else {
 102                         puts("Warning: found cpu node without reg property\n");
 103                 }
 104                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
 105                                                     "cpu", 4);
 106         }
 107
 108         fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
 109                         *boot_code_size);
 110 #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
 111         efi_add_memory_map((uintptr_t)&secondary_boot_code,
 112                            ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
 113                            EFI_RESERVED_MEMORY_TYPE, false);
 114 #endif
 115 }
 116 #endif
 117
 118 void fsl_fdt_disable_usb(void *blob)
 119 {
 120         int off;
 121         /*
 122          * SYSCLK is used as a reference clock for USB. When the USB
 123          * controller is used, SYSCLK must meet the additional requirement
 124          * of 100 MHz.
 125          */
 126         if (CONFIG_SYS_CLK_FREQ != 100000000) {
 127                 off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
 128                 while (off != -FDT_ERR_NOTFOUND) {
 129                         fdt_status_disabled(blob, off);
 130                         off = fdt_node_offset_by_compatible(blob, off,
 131                                                             "snps,dwc3");
 132                 }
 133         }
 134 }
 135
 136 void ft_cpu_setup(void *blob, bd_t *bd)
 137 {
 138 #ifdef CONFIG_FSL_LSCH2
 139         struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
 140         unsigned int svr = in_be32(&gur->svr);
 141
 142         /* delete crypto node if not on an E-processor */
 143         if (!IS_E_PROCESSOR(svr))
 144                 fdt_fixup_crypto_node(blob, 0);
 145 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
 146         else {
 147                 ccsr_sec_t __iomem *sec;
 148
 149                 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
 150                 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
 151         }
 152 #endif
 153 #endif
 154
 155 #ifdef CONFIG_MP
 156         ft_fixup_cpu(blob);
 157 #endif
 158
 159 #ifdef CONFIG_SYS_NS16550
 160         do_fixup_by_compat_u32(blob, "fsl,ns16550",
 161                                "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 162 #endif
 163
 164         do_fixup_by_compat_u32(blob, "fixed-clock",
 165                                "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 166
 167 #ifdef CONFIG_PCI
 168         ft_pci_setup(blob, bd);
 169 #endif
 170
 171 #ifdef CONFIG_FSL_ESDHC
 172         fdt_fixup_esdhc(blob, bd);
 173 #endif
 174
 175 #ifdef CONFIG_SYS_DPAA_FMAN
 176         fdt_fixup_fman_firmware(blob);
 177 #endif
 178         fsl_fdt_disable_usb(blob);
 179
 180 }