git.sur5r.net Git - u-boot/blob - arch/arm/cpu/armv8/fsl-lsch3/fdt.c

   1 /*
   2  * Copyright 2014 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <libfdt.h>
   9 #include <fdt_support.h>
  10 #ifdef CONFIG_FSL_ESDHC
  11 #include <fsl_esdhc.h>
  12 #endif
  13 #include "mp.h"
  14
  15 #ifdef CONFIG_MP
  16 void ft_fixup_cpu(void *blob)
  17 {
  18         int off;
  19         __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
  20         fdt32_t *reg;
  21         int addr_cells;
  22         u64 val, core_id;
  23         size_t *boot_code_size = &(__secondary_boot_code_size);
  24
  25         off = fdt_path_offset(blob, "/cpus");
  26         if (off < 0) {
  27                 puts("couldn't find /cpus node\n");
  28                 return;
  29         }
  30         of_bus_default_count_cells(blob, off, &addr_cells, NULL);
  31
  32         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  33         while (off != -FDT_ERR_NOTFOUND) {
  34                 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  35                 core_id = of_read_number(reg, addr_cells);
  36                 if (reg) {
  37                         if (core_id  == 0 || (is_core_online(core_id))) {
  38                                 val = spin_tbl_addr;
  39                                 val += id_to_core(core_id) *
  40                                        SPIN_TABLE_ELEM_SIZE;
  41                                 val = cpu_to_fdt64(val);
  42                                 fdt_setprop_string(blob, off, "enable-method",
  43                                                    "spin-table");
  44                                 fdt_setprop(blob, off, "cpu-release-addr",
  45                                             &val, sizeof(val));
  46                         } else {
  47                                 debug("skipping offline core\n");
  48                         }
  49                 } else {
  50                         puts("Warning: found cpu node without reg property\n");
  51                 }
  52                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
  53                                                     "cpu", 4);
  54         }
  55
  56         fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
  57                         *boot_code_size);
  58 }
  59 #endif
  60
  61 void ft_cpu_setup(void *blob, bd_t *bd)
  62 {
  63 #ifdef CONFIG_MP
  64         ft_fixup_cpu(blob);
  65 #endif
  66
  67 #ifdef CONFIG_SYS_NS16550
  68         do_fixup_by_compat_u32(blob, "fsl,ns16550",
  69                                "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
  70 #endif
  71
  72 #if defined(CONFIG_FSL_ESDHC)
  73         fdt_fixup_esdhc(blob, bd);
  74 #endif
  75 }