3 * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
10 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
11 # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
13 #include <asm/arch/pxa-regs.h>
17 int usb_cpu_init(void)
19 #if defined(CONFIG_CPU_MONAHANS)
20 /* Enable USB host clock. */
21 writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
24 #if defined(CONFIG_CPU_PXA27X)
25 /* Enable USB host clock. */
26 writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
29 #if defined(CONFIG_CPU_MONAHANS)
30 /* Configure Port 2 for Host (USB Client Registers) */
31 writel(0x3000c, UP2OCR);
34 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
36 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
38 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
39 while (readl(UHCHR) & UHCHR_FSBIR)
42 #if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
43 writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
45 #if defined(CONFIG_CPU_PXA27X)
46 writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
48 writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
53 int usb_cpu_stop(void)
55 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
57 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
59 writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS);
62 #if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
63 writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
65 #if defined(CONFIG_CPU_PXA27X)
66 writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
68 writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
70 #if defined(CONFIG_CPU_MONAHANS)
71 /* Disable USB host clock. */
72 writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
75 #if defined(CONFIG_CPU_PXA27X)
76 /* Disable USB host clock. */
77 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
83 int usb_cpu_init_fail(void)
85 return usb_cpu_stop();
88 # endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */
89 #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */