2 * armboot - Startup Code for SA1100 CPU
4 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm-offsets.h>
17 *************************************************************************
19 * Jump vector table as in table 3.1 in [1]
21 *************************************************************************
27 ldr pc, _undefined_instruction
28 ldr pc, _software_interrupt
29 ldr pc, _prefetch_abort
35 _undefined_instruction: .word undefined_instruction
36 _software_interrupt: .word software_interrupt
37 _prefetch_abort: .word prefetch_abort
38 _data_abort: .word data_abort
39 _not_used: .word not_used
43 .balignl 16,0xdeadbeef
47 *************************************************************************
49 * Startup Code (reset vector)
51 * do important init only if we don't start from memory!
52 * relocate armboot to ram
54 * jump to second stage
56 *************************************************************************
61 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
62 .word CONFIG_SPL_TEXT_BASE
64 .word CONFIG_SYS_TEXT_BASE
68 * These are defined in the board-specific linker script.
69 * Subtracting _start from them lets the linker put their
70 * relative position in the executable instead of leaving
75 .word __bss_start - _start
79 .word __bss_end - _start
86 /* IRQ stack memory (calculated at run-time) */
87 .globl IRQ_STACK_START
91 /* IRQ stack memory (calculated at run-time) */
92 .globl FIQ_STACK_START
97 /* IRQ stack memory (calculated at run-time) + 8 bytes */
98 .globl IRQ_STACK_START_IN
103 * the actual reset code
108 * set the cpu to SVC32 mode
116 * we do sys-critical inits only at reboot,
117 * not when booting from ram!
119 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
125 /*------------------------------------------------------------------------------*/
127 .globl c_runtime_cpu_setup
133 *************************************************************************
135 * CPU_init_critical registers
137 * setup important registers
138 * setup memory timing
140 *************************************************************************
144 /* Interrupt-Controller base address */
145 IC_BASE: .word 0x90050000
149 /* Reset-Controller */
150 RST_BASE: .word 0x90030000
156 PWR_BASE: .word 0x90020000
159 cpuspeed: .word CONFIG_SYS_CPUSPEED
170 /* set clock speed */
176 * before relocating, we have to setup RAM timing
177 * because memory timing is board-dependend, you will
178 * find a lowlevel_init.S in your board directory.
185 * disable MMU stuff and enable I-cache
188 bic r0, r0, #0x00002000 @ clear bit 13 (X)
189 bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
190 orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
191 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
195 * flush v4 I/D caches
198 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
199 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
205 *************************************************************************
209 *************************************************************************
215 #define S_FRAME_SIZE 72
237 #define MODE_SVC 0x13
241 * use bad_save_user_regs for abort/prefetch/undef/swi ...
242 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
245 .macro bad_save_user_regs
246 sub sp, sp, #S_FRAME_SIZE
247 stmia sp, {r0 - r12} @ Calling r0-r12
250 ldr r2, IRQ_STACK_START_IN
251 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
252 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
256 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
260 .macro irq_save_user_regs
261 sub sp, sp, #S_FRAME_SIZE
262 stmia sp, {r0 - r12} @ Calling r0-r12
264 stmdb r8, {sp, lr}^ @ Calling SP, LR
265 str lr, [r8, #0] @ Save calling PC
267 str r6, [r8, #4] @ Save CPSR
268 str r0, [r8, #8] @ Save OLD_R0
272 .macro irq_restore_user_regs
273 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
275 ldr lr, [sp, #S_PC] @ Get PC
276 add sp, sp, #S_FRAME_SIZE
277 subs pc, lr, #4 @ return & move spsr_svc into cpsr
281 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
283 str lr, [r13] @ save caller lr / spsr
287 mov r13, #MODE_SVC @ prepare SVC-Mode
293 .macro get_irq_stack @ setup IRQ stack
294 ldr sp, IRQ_STACK_START
297 .macro get_fiq_stack @ setup FIQ stack
298 ldr sp, FIQ_STACK_START
305 undefined_instruction:
308 bl do_undefined_instruction
314 bl do_software_interrupt
334 #ifdef CONFIG_USE_IRQ
341 irq_restore_user_regs
346 /* someone ought to write a more effiction fiq_save_user_regs */
349 irq_restore_user_regs
371 mov r1, #0x0 @ set bit 3-0 ...
372 str r1, [r0, #RCSR] @ ... to clear in RCSR
374 str r1, [r0, #RSRR] @ and perform reset
375 b reset_cpu @ silly, but repeat endlessly