2 * armboot - Startup Code for SA1100 CPU
4 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm-offsets.h>
33 *************************************************************************
35 * Jump vector table as in table 3.1 in [1]
37 *************************************************************************
43 ldr pc, _undefined_instruction
44 ldr pc, _software_interrupt
45 ldr pc, _prefetch_abort
51 _undefined_instruction: .word undefined_instruction
52 _software_interrupt: .word software_interrupt
53 _prefetch_abort: .word prefetch_abort
54 _data_abort: .word data_abort
55 _not_used: .word not_used
59 .balignl 16,0xdeadbeef
63 *************************************************************************
65 * Startup Code (reset vector)
67 * do important init only if we don't start from memory!
68 * relocate armboot to ram
70 * jump to second stage
72 *************************************************************************
77 .word CONFIG_SYS_TEXT_BASE
80 * These are defined in the board-specific linker script.
91 /* IRQ stack memory (calculated at run-time) */
92 .globl IRQ_STACK_START
96 /* IRQ stack memory (calculated at run-time) */
97 .globl FIQ_STACK_START
102 /* IRQ stack memory (calculated at run-time) + 8 bytes */
103 .globl IRQ_STACK_START_IN
107 .globl _datarel_start
109 .word __datarel_start
111 .globl _datarelrolocal_start
112 _datarelrolocal_start:
113 .word __datarelrolocal_start
115 .globl _datarellocal_start
117 .word __datarellocal_start
119 .globl _datarelro_start
121 .word __datarelro_start
132 * the actual reset code
137 * set the cpu to SVC32 mode
145 * we do sys-critical inits only at reboot,
146 * not when booting from ram!
148 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
152 /* Set stackpointer in internal RAM to call board_init_f */
154 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
158 /*------------------------------------------------------------------------------*/
161 * void relocate_code (addr_sp, gd, addr_moni)
163 * This "function" does not return, instead it continues in RAM
164 * after relocating the monitor code.
169 mov r4, r0 /* save addr_sp */
170 mov r5, r1 /* save addr of gd */
171 mov r6, r2 /* save addr of destination */
172 mov r7, r2 /* save addr of destination */
174 /* Set up the stack */
181 sub r2, r3, r2 /* r2 <- size of armboot */
182 add r2, r0, r2 /* r2 <- source end address */
186 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
188 ldmia r0!, {r9-r10} /* copy from source address [r0] */
189 stmia r6!, {r9-r10} /* copy to target address [r1] */
190 cmp r0, r2 /* until source end address [r2] */
193 #ifndef CONFIG_PRELOADER
194 /* fix got entries */
195 ldr r1, _TEXT_BASE /* Text base */
196 mov r0, r7 /* reloc addr */
197 ldr r2, _got_start /* addr in Flash */
198 ldr r3, _got_end /* addr in Flash */
213 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
216 #ifndef CONFIG_PRELOADER
219 ldr r3, _TEXT_BASE /* Text base */
220 mov r4, r7 /* reloc addr */
225 mov r2, #0x00000000 /* clear */
227 clbss_l:str r2, [r0] /* clear loop... */
234 * We are done. Do not return, instead branch to second part of board
235 * initialization, now running from RAM.
238 ldr r2, _board_init_r
240 add r2, r2, r7 /* position from board_init_r in RAM */
241 /* setup parameters for board_init_r */
242 mov r0, r5 /* gd_t */
243 mov r1, r7 /* dest_addr */
248 _board_init_r: .word board_init_r
251 *************************************************************************
253 * CPU_init_critical registers
255 * setup important registers
256 * setup memory timing
258 *************************************************************************
262 /* Interupt-Controller base address */
263 IC_BASE: .word 0x90050000
267 /* Reset-Controller */
268 RST_BASE: .word 0x90030000
274 PWR_BASE: .word 0x90020000
277 cpuspeed: .word CONFIG_SYS_CPUSPEED
288 /* set clock speed */
294 * before relocating, we have to setup RAM timing
295 * because memory timing is board-dependend, you will
296 * find a lowlevel_init.S in your board directory.
303 * disable MMU stuff and enable I-cache
306 bic r0, r0, #0x00002000 @ clear bit 13 (X)
307 bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
308 orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
309 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
313 * flush v4 I/D caches
316 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
317 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
323 *************************************************************************
327 *************************************************************************
333 #define S_FRAME_SIZE 72
355 #define MODE_SVC 0x13
359 * use bad_save_user_regs for abort/prefetch/undef/swi ...
360 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
363 .macro bad_save_user_regs
364 sub sp, sp, #S_FRAME_SIZE
365 stmia sp, {r0 - r12} @ Calling r0-r12
368 ldr r2, IRQ_STACK_START_IN
369 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
370 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
374 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
378 .macro irq_save_user_regs
379 sub sp, sp, #S_FRAME_SIZE
380 stmia sp, {r0 - r12} @ Calling r0-r12
382 stmdb r8, {sp, lr}^ @ Calling SP, LR
383 str lr, [r8, #0] @ Save calling PC
385 str r6, [r8, #4] @ Save CPSR
386 str r0, [r8, #8] @ Save OLD_R0
390 .macro irq_restore_user_regs
391 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
393 ldr lr, [sp, #S_PC] @ Get PC
394 add sp, sp, #S_FRAME_SIZE
395 subs pc, lr, #4 @ return & move spsr_svc into cpsr
399 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
401 str lr, [r13] @ save caller lr / spsr
405 mov r13, #MODE_SVC @ prepare SVC-Mode
411 .macro get_irq_stack @ setup IRQ stack
412 ldr sp, IRQ_STACK_START
415 .macro get_fiq_stack @ setup FIQ stack
416 ldr sp, FIQ_STACK_START
423 undefined_instruction:
426 bl do_undefined_instruction
432 bl do_software_interrupt
452 #ifdef CONFIG_USE_IRQ
459 irq_restore_user_regs
464 /* someone ought to write a more effiction fiq_save_user_regs */
467 irq_restore_user_regs
489 mov r1, #0x0 @ set bit 3-0 ...
490 str r1, [r0, #RCSR] @ ... to clear in RCSR
492 str r1, [r0, #RSRR] @ and perform reset
493 b reset_cpu @ silly, but repeat endlessly