2 * (C) Copyright 2010-2014
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/clock.h>
11 #include <asm/arch/funcmux.h>
12 #include <asm/arch/tegra.h>
13 #include <asm/arch-tegra/board.h>
14 #include <asm/arch-tegra/pmc.h>
15 #include <asm/arch-tegra/sys_proto.h>
16 #include <asm/arch-tegra/warmboot.h>
18 DECLARE_GLOBAL_DATA_PTR;
21 /* UARTs which we can enable */
31 * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0,
32 * so we are using this value to identify memory size.
35 unsigned int query_sdram_size(void)
37 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
40 reg = readl(&pmc->pmc_scratch20);
41 debug("pmc->pmc_scratch20 (ODMData) = 0x%08x\n", reg);
43 #if defined(CONFIG_TEGRA20)
44 /* bits 30:28 in OdmData are used for RAM size on T20 */
47 switch ((reg) >> 28) {
49 return 0x10000000; /* 256 MB */
53 return 0x20000000; /* 512 MB */
55 return 0x40000000; /* 1GB */
57 #else /* Tegra30/Tegra114 */
58 /* bits 31:28 in OdmData are used for RAM size on T30 */
59 switch ((reg) >> 28) {
63 return 0x10000000; /* 256 MB */
65 return 0x20000000; /* 512 MB */
67 return 0x30000000; /* 768 MB */
69 return 0x40000000; /* 1GB */
71 return 0x7ff00000; /* 2GB - 1MB */
78 /* We do not initialise DRAM here. We just query the size */
79 gd->ram_size = query_sdram_size();
83 #ifdef CONFIG_DISPLAY_BOARDINFO
86 printf("Board: %s\n", sysinfo.board_string);
89 #endif /* CONFIG_DISPLAY_BOARDINFO */
91 static int uart_configs[] = {
92 #if defined(CONFIG_TEGRA20)
93 #if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
94 FUNCMUX_UART1_UAA_UAB,
95 #elif defined(CONFIG_TEGRA_UARTA_GPU)
97 #elif defined(CONFIG_TEGRA_UARTA_SDIO1)
100 FUNCMUX_UART1_IRRX_IRTX,
106 #elif defined(CONFIG_TEGRA30)
107 FUNCMUX_UART1_ULPI, /* UARTA */
112 #elif defined(CONFIG_TEGRA114)
116 FUNCMUX_UART4_GMI, /* UARTD */
119 FUNCMUX_UART1_KBC, /* UARTA */
122 FUNCMUX_UART4_GPIO, /* UARTD */
128 * Set up the specified uarts
130 * @param uarts_ids Mask containing UARTs to init (UARTx)
132 static void setup_uarts(int uart_ids)
134 static enum periph_id id_for_uart[] = {
143 for (i = 0; i < UART_COUNT; i++) {
144 if (uart_ids & (1 << i)) {
145 enum periph_id id = id_for_uart[i];
147 funcmux_select(id, uart_configs[i]);
148 clock_ll_start_uart(id);
153 void board_init_uart_f(void)
155 int uart_ids = 0; /* bit mask of which UART ids to enable */
157 #ifdef CONFIG_TEGRA_ENABLE_UARTA
160 #ifdef CONFIG_TEGRA_ENABLE_UARTB
163 #ifdef CONFIG_TEGRA_ENABLE_UARTC
166 #ifdef CONFIG_TEGRA_ENABLE_UARTD
169 #ifdef CONFIG_TEGRA_ENABLE_UARTE
172 setup_uarts(uart_ids);
175 #ifndef CONFIG_SYS_DCACHE_OFF
176 void enable_caches(void)
178 /* Enable D-cache. I-cache is already enabled in start.S */