2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/tegra.h>
12 #include <asm/arch-tegra/ap.h>
13 #include <asm/arch-tegra/tegra_i2c.h>
14 #include <asm/arch-tegra/sys_proto.h>
16 #define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */
17 #define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */
19 #define VDD_CORE_NOMINAL_T20 0x16 /* 1.275v */
20 #define VDD_CPU_NOMINAL_T20 0x0f /* 1.1v */
22 #define VDD_RELATION 0x02 /* 50mv */
23 #define VDD_TRANSITION_STEP 0x06 /* 150mv */
24 #define VDD_TRANSITION_RATE 0x06 /* 3.52mv/us */
26 int pmu_set_nominal(void)
30 /* by default, the table has been filled with T25 settings */
31 switch (tegra_get_chip_sku()) {
33 core = VDD_CORE_NOMINAL_T20;
34 cpu = VDD_CPU_NOMINAL_T20;
37 core = VDD_CORE_NOMINAL_T25;
38 cpu = VDD_CPU_NOMINAL_T25;
41 debug("%s: Unknown SKU id\n", __func__);
45 bus = tegra_i2c_get_dvc_bus_num();
47 debug("%s: Cannot find DVC I2C bus\n", __func__);
51 tps6586x_set_pwm_mode(TPS6586X_PWM_SM1);
52 return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP,
53 VDD_TRANSITION_RATE, VDD_RELATION);