2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
51 interrupt-parent = <&gic>;
54 wakeupgen: interrupt-controller@48281000 {
55 compatible = "ti,omap4-wugen-mpu";
57 #interrupt-cells = <3>;
58 reg = <0x48281000 0x1000>;
59 interrupt-parent = <&gic>;
62 l2-cache-controller@48242000 {
63 compatible = "arm,pl310-cache";
64 reg = <0x48242000 0x1000>;
70 compatible = "ti,am4372-l3-noc", "simple-bus";
74 ti,hwmods = "l3_main";
75 reg = <0x44000000 0x400000
77 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
78 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
80 l4_wkup: l4_wkup@44c00000 {
81 compatible = "ti,am4-l4-wkup", "simple-bus";
84 ranges = <0 0x44c00000 0x287000>;
87 compatible = "ti,am4-prcm";
88 reg = <0x1f0000 0x11000>;
95 prcm_clockdomains: clockdomains {
100 compatible = "ti,am4-scm", "simple-bus";
101 reg = <0x210000 0x4000>;
102 #address-cells = <1>;
104 ranges = <0 0x210000 0x4000>;
106 am43xx_pinmux: pinmux@800 {
107 compatible = "ti,am437-padconf",
110 #address-cells = <1>;
112 #interrupt-cells = <1>;
113 interrupt-controller;
114 pinctrl-single,register-width = <32>;
115 pinctrl-single,function-mask = <0xffffffff>;
118 scm_conf: scm_conf@0 {
119 compatible = "syscon";
121 #address-cells = <1>;
125 #address-cells = <1>;
130 scm_clockdomains: clockdomains {
135 emif: emif@4c000000 {
136 compatible = "ti,emif-am4372";
137 reg = <0x4c000000 0x1000000>;
141 edma: edma@49000000 {
142 compatible = "ti,edma3";
143 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
144 reg = <0x49000000 0x10000>,
146 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
147 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
148 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
152 uart0: serial@44e09000 {
153 compatible = "ti,am4372-uart","ti,omap2-uart";
154 reg = <0x44e09000 0x2000>;
155 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
159 uart1: serial@48022000 {
160 compatible = "ti,am4372-uart","ti,omap2-uart";
161 reg = <0x48022000 0x2000>;
162 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
167 uart2: serial@48024000 {
168 compatible = "ti,am4372-uart","ti,omap2-uart";
169 reg = <0x48024000 0x2000>;
170 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
175 uart3: serial@481a6000 {
176 compatible = "ti,am4372-uart","ti,omap2-uart";
177 reg = <0x481a6000 0x2000>;
178 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
183 uart4: serial@481a8000 {
184 compatible = "ti,am4372-uart","ti,omap2-uart";
185 reg = <0x481a8000 0x2000>;
186 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
191 uart5: serial@481aa000 {
192 compatible = "ti,am4372-uart","ti,omap2-uart";
193 reg = <0x481aa000 0x2000>;
194 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
199 mailbox: mailbox@480C8000 {
200 compatible = "ti,omap4-mailbox";
201 reg = <0x480C8000 0x200>;
202 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
203 ti,hwmods = "mailbox";
205 ti,mbox-num-users = <4>;
206 ti,mbox-num-fifos = <8>;
207 mbox_wkupm3: wkup_m3 {
208 ti,mbox-tx = <0 0 0>;
209 ti,mbox-rx = <0 0 3>;
213 timer1: timer@44e31000 {
214 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
215 reg = <0x44e31000 0x400>;
216 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
218 ti,hwmods = "timer1";
221 timer2: timer@48040000 {
222 compatible = "ti,am4372-timer","ti,am335x-timer";
223 reg = <0x48040000 0x400>;
224 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
225 ti,hwmods = "timer2";
228 timer3: timer@48042000 {
229 compatible = "ti,am4372-timer","ti,am335x-timer";
230 reg = <0x48042000 0x400>;
231 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
232 ti,hwmods = "timer3";
236 timer4: timer@48044000 {
237 compatible = "ti,am4372-timer","ti,am335x-timer";
238 reg = <0x48044000 0x400>;
239 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
241 ti,hwmods = "timer4";
245 timer5: timer@48046000 {
246 compatible = "ti,am4372-timer","ti,am335x-timer";
247 reg = <0x48046000 0x400>;
248 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
250 ti,hwmods = "timer5";
254 timer6: timer@48048000 {
255 compatible = "ti,am4372-timer","ti,am335x-timer";
256 reg = <0x48048000 0x400>;
257 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
259 ti,hwmods = "timer6";
263 timer7: timer@4804a000 {
264 compatible = "ti,am4372-timer","ti,am335x-timer";
265 reg = <0x4804a000 0x400>;
266 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
268 ti,hwmods = "timer7";
272 timer8: timer@481c1000 {
273 compatible = "ti,am4372-timer","ti,am335x-timer";
274 reg = <0x481c1000 0x400>;
275 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
276 ti,hwmods = "timer8";
280 timer9: timer@4833d000 {
281 compatible = "ti,am4372-timer","ti,am335x-timer";
282 reg = <0x4833d000 0x400>;
283 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
284 ti,hwmods = "timer9";
288 timer10: timer@4833f000 {
289 compatible = "ti,am4372-timer","ti,am335x-timer";
290 reg = <0x4833f000 0x400>;
291 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
292 ti,hwmods = "timer10";
296 timer11: timer@48341000 {
297 compatible = "ti,am4372-timer","ti,am335x-timer";
298 reg = <0x48341000 0x400>;
299 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
300 ti,hwmods = "timer11";
304 counter32k: counter@44e86000 {
305 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
306 reg = <0x44e86000 0x40>;
307 ti,hwmods = "counter_32k";
311 compatible = "ti,am4372-rtc","ti,da830-rtc";
312 reg = <0x44e3e000 0x1000>;
313 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
320 compatible = "ti,am4372-wdt","ti,omap3-wdt";
321 reg = <0x44e35000 0x1000>;
322 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
323 ti,hwmods = "wd_timer2";
326 gpio0: gpio@44e07000 {
327 compatible = "ti,am4372-gpio","ti,omap4-gpio";
328 reg = <0x44e07000 0x1000>;
329 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
332 interrupt-controller;
333 #interrupt-cells = <2>;
338 gpio1: gpio@4804c000 {
339 compatible = "ti,am4372-gpio","ti,omap4-gpio";
340 reg = <0x4804c000 0x1000>;
341 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
344 interrupt-controller;
345 #interrupt-cells = <2>;
350 gpio2: gpio@481ac000 {
351 compatible = "ti,am4372-gpio","ti,omap4-gpio";
352 reg = <0x481ac000 0x1000>;
353 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
356 interrupt-controller;
357 #interrupt-cells = <2>;
362 gpio3: gpio@481ae000 {
363 compatible = "ti,am4372-gpio","ti,omap4-gpio";
364 reg = <0x481ae000 0x1000>;
365 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
368 interrupt-controller;
369 #interrupt-cells = <2>;
374 gpio4: gpio@48320000 {
375 compatible = "ti,am4372-gpio","ti,omap4-gpio";
376 reg = <0x48320000 0x1000>;
377 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
380 interrupt-controller;
381 #interrupt-cells = <2>;
386 gpio5: gpio@48322000 {
387 compatible = "ti,am4372-gpio","ti,omap4-gpio";
388 reg = <0x48322000 0x1000>;
389 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
392 interrupt-controller;
393 #interrupt-cells = <2>;
398 hwspinlock: spinlock@480ca000 {
399 compatible = "ti,omap4-hwspinlock";
400 reg = <0x480ca000 0x1000>;
401 ti,hwmods = "spinlock";
406 compatible = "ti,am4372-i2c","ti,omap4-i2c";
407 reg = <0x44e0b000 0x1000>;
408 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
410 #address-cells = <1>;
416 compatible = "ti,am4372-i2c","ti,omap4-i2c";
417 reg = <0x4802a000 0x1000>;
418 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
420 #address-cells = <1>;
426 compatible = "ti,am4372-i2c","ti,omap4-i2c";
427 reg = <0x4819c000 0x1000>;
428 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
430 #address-cells = <1>;
436 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
437 reg = <0x48030000 0x400>;
438 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
440 #address-cells = <1>;
446 compatible = "ti,omap4-hsmmc";
447 reg = <0x48060000 0x1000>;
450 ti,needs-special-reset;
453 dma-names = "tx", "rx";
454 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
459 compatible = "ti,omap4-hsmmc";
460 reg = <0x481d8000 0x1000>;
462 ti,needs-special-reset;
465 dma-names = "tx", "rx";
466 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
471 compatible = "ti,omap4-hsmmc";
472 reg = <0x47810000 0x1000>;
474 ti,needs-special-reset;
475 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
480 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
481 reg = <0x481a0000 0x400>;
482 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
484 #address-cells = <1>;
490 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
491 reg = <0x481a2000 0x400>;
492 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
494 #address-cells = <1>;
500 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
501 reg = <0x481a4000 0x400>;
502 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
504 #address-cells = <1>;
510 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
511 reg = <0x48345000 0x400>;
512 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
514 #address-cells = <1>;
519 mac: ethernet@4a100000 {
520 compatible = "ti,am4372-cpsw","ti,cpsw";
521 reg = <0x4a100000 0x800
523 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
524 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
525 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
526 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
527 #address-cells = <1>;
529 ti,hwmods = "cpgmac0";
530 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
531 clock-names = "fck", "cpts";
533 cpdma_channels = <8>;
534 ale_entries = <1024>;
535 bd_ram_size = <0x2000>;
538 mac_control = <0x20>;
541 cpts_clock_mult = <0x80000000>;
542 cpts_clock_shift = <29>;
545 davinci_mdio: mdio@4a101000 {
546 compatible = "ti,am4372-mdio","ti,davinci_mdio";
547 reg = <0x4a101000 0x100>;
548 #address-cells = <1>;
550 ti,hwmods = "davinci_mdio";
551 bus_freq = <1000000>;
555 cpsw_emac0: slave@4a100200 {
556 /* Filled in by U-Boot */
557 mac-address = [ 00 00 00 00 00 00 ];
560 cpsw_emac1: slave@4a100300 {
561 /* Filled in by U-Boot */
562 mac-address = [ 00 00 00 00 00 00 ];
565 phy_sel: cpsw-phy-sel@44e10650 {
566 compatible = "ti,am43xx-cpsw-phy-sel";
567 reg= <0x44e10650 0x4>;
568 reg-names = "gmii-sel";
572 epwmss0: epwmss@48300000 {
573 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
574 reg = <0x48300000 0x10>;
575 #address-cells = <1>;
578 ti,hwmods = "epwmss0";
581 ecap0: ecap@48300100 {
582 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
584 reg = <0x48300100 0x80>;
589 ehrpwm0: ehrpwm@48300200 {
590 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
592 reg = <0x48300200 0x80>;
593 ti,hwmods = "ehrpwm0";
598 epwmss1: epwmss@48302000 {
599 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
600 reg = <0x48302000 0x10>;
601 #address-cells = <1>;
604 ti,hwmods = "epwmss1";
607 ecap1: ecap@48302100 {
608 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
610 reg = <0x48302100 0x80>;
615 ehrpwm1: ehrpwm@48302200 {
616 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
618 reg = <0x48302200 0x80>;
619 ti,hwmods = "ehrpwm1";
624 epwmss2: epwmss@48304000 {
625 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
626 reg = <0x48304000 0x10>;
627 #address-cells = <1>;
630 ti,hwmods = "epwmss2";
633 ecap2: ecap@48304100 {
634 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
636 reg = <0x48304100 0x80>;
641 ehrpwm2: ehrpwm@48304200 {
642 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
644 reg = <0x48304200 0x80>;
645 ti,hwmods = "ehrpwm2";
650 epwmss3: epwmss@48306000 {
651 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
652 reg = <0x48306000 0x10>;
653 #address-cells = <1>;
656 ti,hwmods = "epwmss3";
659 ehrpwm3: ehrpwm@48306200 {
660 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
662 reg = <0x48306200 0x80>;
663 ti,hwmods = "ehrpwm3";
668 epwmss4: epwmss@48308000 {
669 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
670 reg = <0x48308000 0x10>;
671 #address-cells = <1>;
674 ti,hwmods = "epwmss4";
677 ehrpwm4: ehrpwm@48308200 {
678 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
680 reg = <0x48308200 0x80>;
681 ti,hwmods = "ehrpwm4";
686 epwmss5: epwmss@4830a000 {
687 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
688 reg = <0x4830a000 0x10>;
689 #address-cells = <1>;
692 ti,hwmods = "epwmss5";
695 ehrpwm5: ehrpwm@4830a200 {
696 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
698 reg = <0x4830a200 0x80>;
699 ti,hwmods = "ehrpwm5";
704 tscadc: tscadc@44e0d000 {
705 compatible = "ti,am3359-tscadc";
706 reg = <0x44e0d000 0x1000>;
707 ti,hwmods = "adc_tsc";
708 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&adc_tsc_fck>;
714 compatible = "ti,am3359-tsc";
718 #io-channel-cells = <1>;
719 compatible = "ti,am3359-adc";
724 sham: sham@53100000 {
725 compatible = "ti,omap5-sham";
727 reg = <0x53100000 0x300>;
730 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
734 compatible = "ti,omap4-aes";
736 reg = <0x53501000 0xa0>;
737 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
740 dma-names = "tx", "rx";
744 compatible = "ti,omap4-des";
746 reg = <0x53701000 0xa0>;
747 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
750 dma-names = "tx", "rx";
753 mcasp0: mcasp@48038000 {
754 compatible = "ti,am33xx-mcasp-audio";
755 ti,hwmods = "mcasp0";
756 reg = <0x48038000 0x2000>,
757 <0x46000000 0x400000>;
758 reg-names = "mpu", "dat";
759 interrupts = <80>, <81>;
760 interrupt-names = "tx", "rx";
764 dma-names = "tx", "rx";
767 mcasp1: mcasp@4803C000 {
768 compatible = "ti,am33xx-mcasp-audio";
769 ti,hwmods = "mcasp1";
770 reg = <0x4803C000 0x2000>,
771 <0x46400000 0x400000>;
772 reg-names = "mpu", "dat";
773 interrupts = <82>, <83>;
774 interrupt-names = "tx", "rx";
778 dma-names = "tx", "rx";
782 compatible = "ti,am3352-elm";
783 reg = <0x48080000 0x2000>;
784 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
786 clocks = <&l4ls_gclk>;
791 gpmc: gpmc@50000000 {
792 compatible = "ti,am3352-gpmc";
794 clocks = <&l3s_gclk>;
796 reg = <0x50000000 0x2000>;
797 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
799 gpmc,num-waitpins = <2>;
800 #address-cells = <2>;
805 am43xx_control_usb2phy1: control-phy@44e10620 {
806 compatible = "ti,control-phy-usb2-am437";
807 reg = <0x44e10620 0x4>;
811 am43xx_control_usb2phy2: control-phy@0x44e10628 {
812 compatible = "ti,control-phy-usb2-am437";
813 reg = <0x44e10628 0x4>;
817 ocp2scp0: ocp2scp@483a8000 {
818 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
819 #address-cells = <1>;
822 ti,hwmods = "ocp2scp0";
824 usb2_phy1: phy@483a8000 {
825 compatible = "ti,am437x-usb2";
826 reg = <0x483a8000 0x8000>;
827 ctrl-module = <&am43xx_control_usb2phy1>;
828 clocks = <&usb_phy0_always_on_clk32k>,
829 <&usb_otg_ss0_refclk960m>;
830 clock-names = "wkupclk", "refclk";
836 ocp2scp1: ocp2scp@483e8000 {
837 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
838 #address-cells = <1>;
841 ti,hwmods = "ocp2scp1";
843 usb2_phy2: phy@483e8000 {
844 compatible = "ti,am437x-usb2";
845 reg = <0x483e8000 0x8000>;
846 ctrl-module = <&am43xx_control_usb2phy2>;
847 clocks = <&usb_phy1_always_on_clk32k>,
848 <&usb_otg_ss1_refclk960m>;
849 clock-names = "wkupclk", "refclk";
855 dwc3_1: omap_dwc3@48380000 {
856 compatible = "ti,am437x-dwc3";
857 ti,hwmods = "usb_otg_ss0";
858 reg = <0x48380000 0x10000>;
859 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
860 #address-cells = <1>;
866 compatible = "synopsys,dwc3";
867 reg = <0x48390000 0x10000>;
868 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
870 phy-names = "usb2-phy";
871 maximum-speed = "high-speed";
874 snps,dis_u3_susphy_quirk;
875 snps,dis_u2_susphy_quirk;
879 dwc3_2: omap_dwc3@483c0000 {
880 compatible = "ti,am437x-dwc3";
881 ti,hwmods = "usb_otg_ss1";
882 reg = <0x483c0000 0x10000>;
883 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
884 #address-cells = <1>;
890 compatible = "synopsys,dwc3";
891 reg = <0x483d0000 0x10000>;
892 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
894 phy-names = "usb2-phy";
895 maximum-speed = "high-speed";
898 snps,dis_u3_susphy_quirk;
899 snps,dis_u2_susphy_quirk;
903 qspi: qspi@47900000 {
904 compatible = "ti,am4372-qspi";
905 reg = <0x47900000 0x100>;
906 #address-cells = <1>;
909 interrupts = <0 138 0x4>;
915 compatible = "ti,am4372-hdq";
916 reg = <0x48347000 0x1000>;
917 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
918 clocks = <&func_12m_clk>;
925 compatible = "ti,omap3-dss";
926 reg = <0x4832a000 0x200>;
928 ti,hwmods = "dss_core";
929 clocks = <&disp_clk>;
931 #address-cells = <1>;
935 dispc: dispc@4832a400 {
936 compatible = "ti,omap3-dispc";
937 reg = <0x4832a400 0x400>;
938 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
939 ti,hwmods = "dss_dispc";
940 clocks = <&disp_clk>;
944 rfbi: rfbi@4832a800 {
945 compatible = "ti,omap3-rfbi";
946 reg = <0x4832a800 0x100>;
947 ti,hwmods = "dss_rfbi";
948 clocks = <&disp_clk>;
954 ocmcram: ocmcram@40300000 {
955 compatible = "mmio-sram";
956 reg = <0x40300000 0x40000>; /* 256k */
959 dcan0: can@481cc000 {
960 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
961 ti,hwmods = "d_can0";
962 clocks = <&dcan0_fck>;
964 reg = <0x481cc000 0x2000>;
965 syscon-raminit = <&scm_conf 0x644 0>;
966 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
970 dcan1: can@481d0000 {
971 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
972 ti,hwmods = "d_can1";
973 clocks = <&dcan1_fck>;
975 reg = <0x481d0000 0x2000>;
976 syscon-raminit = <&scm_conf 0x644 1>;
977 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
981 vpfe0: vpfe@48326000 {
982 compatible = "ti,am437x-vpfe";
983 reg = <0x48326000 0x2000>;
984 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
989 vpfe1: vpfe@48328000 {
990 compatible = "ti,am437x-vpfe";
991 reg = <0x48328000 0x2000>;
992 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
999 /include/ "am43xx-clocks.dtsi"