2 * Device Tree file for Marvell Armada 385 development board
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
14 * a) This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without
16 * any warranty of any kind, whether express or implied.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "armada-388.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Marvell Armada 385 GP";
48 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
51 stdout-path = "serial0:115200n8";
59 device_type = "memory";
60 reg = <0x00000000 0x80000000>; /* 2 GB */
64 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
65 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&spi0_pins>;
78 compatible = "st,m25p128", "jedec,spi-nor";
79 reg = <0>; /* Chip select 0 */
80 spi-max-frequency = <50000000>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&i2c0_pins>;
89 clock-frequency = <100000>;
91 * The EEPROM located at adresse 54 is needed
92 * for the boot - DO NOT ERASE IT -
95 expander0: pca9555@20 {
96 compatible = "nxp,pca9555";
97 pinctrl-names = "default";
98 pinctrl-0 = <&pca0_pins>;
99 interrupt-parent = <&gpio0>;
100 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
103 interrupt-controller;
104 #interrupt-cells = <2>;
108 expander1: pca9555@21 {
109 compatible = "nxp,pca9555";
110 pinctrl-names = "default";
111 interrupt-parent = <&gpio0>;
112 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
115 interrupt-controller;
116 #interrupt-cells = <2>;
124 * Exported on the micro USB connector CON16
128 pinctrl-names = "default";
129 pinctrl-0 = <&uart0_pins>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&ge1_rgmii_pins>;
140 phy-mode = "rgmii-id";
145 vcc-supply = <®_usb2_0_vbus>;
151 pinctrl-names = "default";
153 * The Reference Clock 0 is used to provide a
156 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
159 phy-mode = "rgmii-id";
164 pinctrl-names = "default";
165 pinctrl-0 = <&mdio_pins>;
167 phy0: ethernet-phy@1 {
171 phy1: ethernet-phy@0 {
177 pinctrl-names = "default";
178 pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
180 #address-cells = <1>;
185 target-supply = <®_5v_sata0>;
190 target-supply = <®_5v_sata1>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
198 #address-cells = <1>;
203 target-supply = <®_5v_sata2>;
208 target-supply = <®_5v_sata3>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&sdhci_pins>;
215 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
224 vcc-supply = <®_usb2_1_vbus>;
230 vcc-supply = <®_usb3_vbus>;
238 * One PCIe units is accessible through
239 * standard PCIe slot on the board.
247 * The two other PCIe units are accessible
248 * through mini PCIe slot on the board.
261 compatible = "gpio-fan";
262 gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
263 gpio-fan,speed-map = < 0 0
268 reg_usb3_vbus: usb3-vbus {
269 compatible = "regulator-fixed";
270 regulator-name = "usb3-vbus";
271 regulator-min-microvolt = <5000000>;
272 regulator-max-microvolt = <5000000>;
275 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
278 reg_usb2_0_vbus: v5-vbus0 {
279 compatible = "regulator-fixed";
280 regulator-name = "v5.0-vbus0";
281 regulator-min-microvolt = <5000000>;
282 regulator-max-microvolt = <5000000>;
285 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
288 reg_usb2_1_vbus: v5-vbus1 {
289 compatible = "regulator-fixed";
290 regulator-name = "v5.0-vbus1";
291 regulator-min-microvolt = <5000000>;
292 regulator-max-microvolt = <5000000>;
295 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
298 reg_usb2_1_vbus: v5-vbus1 {
299 compatible = "regulator-fixed";
300 regulator-name = "v5.0-vbus1";
301 regulator-min-microvolt = <5000000>;
302 regulator-max-microvolt = <5000000>;
305 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
308 reg_sata0: pwr-sata0 {
309 compatible = "regulator-fixed";
310 regulator-name = "pwr_en_sata0";
316 reg_5v_sata0: v5-sata0 {
317 compatible = "regulator-fixed";
318 regulator-name = "v5.0-sata0";
319 regulator-min-microvolt = <5000000>;
320 regulator-max-microvolt = <5000000>;
322 vin-supply = <®_sata0>;
325 reg_12v_sata0: v12-sata0 {
326 compatible = "regulator-fixed";
327 regulator-name = "v12.0-sata0";
328 regulator-min-microvolt = <12000000>;
329 regulator-max-microvolt = <12000000>;
331 vin-supply = <®_sata0>;
334 reg_sata1: pwr-sata1 {
335 regulator-name = "pwr_en_sata1";
336 compatible = "regulator-fixed";
337 regulator-min-microvolt = <12000000>;
338 regulator-max-microvolt = <12000000>;
341 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
344 reg_5v_sata1: v5-sata1 {
345 compatible = "regulator-fixed";
346 regulator-name = "v5.0-sata1";
347 regulator-min-microvolt = <5000000>;
348 regulator-max-microvolt = <5000000>;
350 vin-supply = <®_sata1>;
353 reg_12v_sata1: v12-sata1 {
354 compatible = "regulator-fixed";
355 regulator-name = "v12.0-sata1";
356 regulator-min-microvolt = <12000000>;
357 regulator-max-microvolt = <12000000>;
359 vin-supply = <®_sata1>;
362 reg_sata2: pwr-sata2 {
363 compatible = "regulator-fixed";
364 regulator-name = "pwr_en_sata2";
367 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
370 reg_5v_sata2: v5-sata2 {
371 compatible = "regulator-fixed";
372 regulator-name = "v5.0-sata2";
373 regulator-min-microvolt = <5000000>;
374 regulator-max-microvolt = <5000000>;
376 vin-supply = <®_sata2>;
379 reg_12v_sata2: v12-sata2 {
380 compatible = "regulator-fixed";
381 regulator-name = "v12.0-sata2";
382 regulator-min-microvolt = <12000000>;
383 regulator-max-microvolt = <12000000>;
385 vin-supply = <®_sata2>;
388 reg_sata3: pwr-sata3 {
389 compatible = "regulator-fixed";
390 regulator-name = "pwr_en_sata3";
393 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
396 reg_5v_sata3: v5-sata3 {
397 compatible = "regulator-fixed";
398 regulator-name = "v5.0-sata3";
399 regulator-min-microvolt = <5000000>;
400 regulator-max-microvolt = <5000000>;
402 vin-supply = <®_sata3>;
405 reg_12v_sata3: v12-sata3 {
406 compatible = "regulator-fixed";
407 regulator-name = "v12.0-sata3";
408 regulator-min-microvolt = <12000000>;
409 regulator-max-microvolt = <12000000>;
411 vin-supply = <®_sata3>;
416 pca0_pins: pca0_pins {
417 marvell,pins = "mpp18";
418 marvell,function = "gpio";