git.sur5r.net Git - u-boot/blob - arch/arm/dts/armada-38x.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 38x family of SoCs.
   3  *
   4  * Copyright (C) 2014 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  *
  10  * This file is dual-licensed: you can use it either under the terms
  11  * of the GPL or the X11 license, at your option. Note that this dual
  12  * licensing only applies to this file, and not this project as a
  13  * whole.
  14  *
  15  *  a) This file is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of the
  18  *     License, or (at your option) any later version.
  19  *
  20  *     This file is distributed in the hope that it will be useful
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include "skeleton.dtsi"
  50 #include <dt-bindings/interrupt-controller/arm-gic.h>
  51 #include <dt-bindings/interrupt-controller/irq.h>
  52
  53 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  54
  55 / {
  56         model = "Marvell Armada 38x family SoC";
  57         compatible = "marvell,armada380";
  58
  59         aliases {
  60                 gpio0 = &gpio0;
  61                 gpio1 = &gpio1;
  62                 serial0 = &uart0;
  63                 serial1 = &uart1;
  64         };
  65
  66         pmu {
  67                 compatible = "arm,cortex-a9-pmu";
  68                 interrupts-extended = <&mpic 3>;
  69         };
  70
  71         soc {
  72                 compatible = "marvell,armada380-mbus", "simple-bus";
  73                 u-boot,dm-pre-reloc;
  74                 #address-cells = <2>;
  75                 #size-cells = <1>;
  76                 controller = <&mbusc>;
  77                 interrupt-parent = <&gic>;
  78                 pcie-mem-aperture = <0xe0000000 0x8000000>;
  79                 pcie-io-aperture  = <0xe8000000 0x100000>;
  80
  81                 bootrom {
  82                         compatible = "marvell,bootrom";
  83                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
  84                 };
  85
  86                 devbus-bootcs {
  87                         compatible = "marvell,mvebu-devbus";
  88                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  89                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92                         clocks = <&coreclk 0>;
  93                         status = "disabled";
  94                 };
  95
  96                 devbus-cs0 {
  97                         compatible = "marvell,mvebu-devbus";
  98                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  99                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
 100                         #address-cells = <1>;
 101                         #size-cells = <1>;
 102                         clocks = <&coreclk 0>;
 103                         status = "disabled";
 104                 };
 105
 106                 devbus-cs1 {
 107                         compatible = "marvell,mvebu-devbus";
 108                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
 109                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
 110                         #address-cells = <1>;
 111                         #size-cells = <1>;
 112                         clocks = <&coreclk 0>;
 113                         status = "disabled";
 114                 };
 115
 116                 devbus-cs2 {
 117                         compatible = "marvell,mvebu-devbus";
 118                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
 119                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
 120                         #address-cells = <1>;
 121                         #size-cells = <1>;
 122                         clocks = <&coreclk 0>;
 123                         status = "disabled";
 124                 };
 125
 126                 devbus-cs3 {
 127                         compatible = "marvell,mvebu-devbus";
 128                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
 129                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
 130                         #address-cells = <1>;
 131                         #size-cells = <1>;
 132                         clocks = <&coreclk 0>;
 133                         status = "disabled";
 134                 };
 135
 136                 internal-regs {
 137                         compatible = "simple-bus";
 138                         u-boot,dm-pre-reloc;
 139                         #address-cells = <1>;
 140                         #size-cells = <1>;
 141                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 142
 143                         L2: cache-controller@8000 {
 144                                 compatible = "arm,pl310-cache";
 145                                 reg = <0x8000 0x1000>;
 146                                 cache-unified;
 147                                 cache-level = <2>;
 148                         };
 149
 150                         scu@c000 {
 151                                 compatible = "arm,cortex-a9-scu";
 152                                 reg = <0xc000 0x58>;
 153                         };
 154
 155                         timer@c600 {
 156                                 compatible = "arm,cortex-a9-twd-timer";
 157                                 reg = <0xc600 0x20>;
 158                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
 159                                 clocks = <&coreclk 2>;
 160                         };
 161
 162                         gic: interrupt-controller@d000 {
 163                                 compatible = "arm,cortex-a9-gic";
 164                                 #interrupt-cells = <3>;
 165                                 #size-cells = <0>;
 166                                 interrupt-controller;
 167                                 reg = <0xd000 0x1000>,
 168                                       <0xc100 0x100>;
 169                         };
 170
 171                         spi0: spi@10600 {
 172                                 compatible = "marvell,armada-380-spi",
 173                                                 "marvell,orion-spi";
 174                                 reg = <0x10600 0x50>;
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                                 cell-index = <0>;
 178                                 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 179                                 clocks = <&coreclk 0>;
 180                                 status = "disabled";
 181                         };
 182
 183                         spi1: spi@10680 {
 184                                 compatible = "marvell,armada-380-spi",
 185                                                 "marvell,orion-spi";
 186                                 reg = <0x10680 0x50>;
 187                                 #address-cells = <1>;
 188                                 #size-cells = <0>;
 189                                 cell-index = <1>;
 190                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 191                                 clocks = <&coreclk 0>;
 192                                 status = "disabled";
 193                         };
 194
 195                         i2c0: i2c@11000 {
 196                                 compatible = "marvell,mv64xxx-i2c";
 197                                 reg = <0x11000 0x20>;
 198                                 #address-cells = <1>;
 199                                 #size-cells = <0>;
 200                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 201                                 timeout-ms = <1000>;
 202                                 clocks = <&coreclk 0>;
 203                                 status = "disabled";
 204                         };
 205
 206                         i2c1: i2c@11100 {
 207                                 compatible = "marvell,mv64xxx-i2c";
 208                                 reg = <0x11100 0x20>;
 209                                 #address-cells = <1>;
 210                                 #size-cells = <0>;
 211                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 212                                 timeout-ms = <1000>;
 213                                 clocks = <&coreclk 0>;
 214                                 status = "disabled";
 215                         };
 216
 217                         uart0: serial@12000 {
 218                                 compatible = "snps,dw-apb-uart";
 219                                 reg = <0x12000 0x100>;
 220                                 reg-shift = <2>;
 221                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 222                                 reg-io-width = <1>;
 223                                 clocks = <&coreclk 0>;
 224                                 status = "disabled";
 225                         };
 226
 227                         uart1: serial@12100 {
 228                                 compatible = "snps,dw-apb-uart";
 229                                 reg = <0x12100 0x100>;
 230                                 reg-shift = <2>;
 231                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 232                                 reg-io-width = <1>;
 233                                 clocks = <&coreclk 0>;
 234                                 status = "disabled";
 235                         };
 236
 237                         pinctrl: pinctrl@18000 {
 238                                 reg = <0x18000 0x20>;
 239
 240                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
 241                                         marvell,pins = "mpp6", "mpp7", "mpp8",
 242                                                        "mpp9", "mpp10", "mpp11",
 243                                                        "mpp12", "mpp13", "mpp14",
 244                                                        "mpp15", "mpp16", "mpp17";
 245                                         marvell,function = "ge0";
 246                                 };
 247
 248                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
 249                                         marvell,pins = "mpp21", "mpp27", "mpp28",
 250                                                        "mpp29", "mpp30", "mpp31",
 251                                                        "mpp32", "mpp37", "mpp38",
 252                                                        "mpp39", "mpp40", "mpp41";
 253                                         marvell,function = "ge1";
 254                                 };
 255
 256                                 i2c0_pins: i2c-pins-0 {
 257                                         marvell,pins = "mpp2", "mpp3";
 258                                         marvell,function = "i2c0";
 259                                 };
 260
 261                                 nand_pins: nand-pins {
 262                                         marvell,pins = "mpp22", "mpp34", "mpp23", "mpp33",
 263                                                        "mpp38", "mpp28", "mpp40", "mpp42",
 264                                                        "mpp35", "mpp36", "mpp25", "mpp30",
 265                                                        "mpp32";
 266                                         marvell,function = "dev";
 267                                 };
 268
 269                                 nand_rb: nand-rb {
 270                                         marvell,pins = "mpp41";
 271                                         marvell,function = "nand";
 272                                 };
 273
 274                                 mdio_pins: mdio-pins {
 275                                         marvell,pins = "mpp4", "mpp5";
 276                                         marvell,function = "ge";
 277                                 };
 278
 279                                 ref_clk0_pins: ref-clk-pins-0 {
 280                                         marvell,pins = "mpp45";
 281                                         marvell,function = "ref";
 282                                 };
 283
 284                                 ref_clk1_pins: ref-clk-pins-1 {
 285                                         marvell,pins = "mpp46";
 286                                         marvell,function = "ref";
 287                                 };
 288
 289                                 spi0_pins: spi-pins-0 {
 290                                         marvell,pins = "mpp22", "mpp23", "mpp24",
 291                                                        "mpp25";
 292                                         marvell,function = "spi0";
 293                                 };
 294
 295                                 spi1_pins: spi-pins-1 {
 296                                         marvell,pins = "mpp56", "mpp57", "mpp58",
 297                                                        "mpp59";
 298                                         marvell,function = "spi1";
 299                                 };
 300
 301                                 uart0_pins: uart-pins-0 {
 302                                         marvell,pins = "mpp0", "mpp1";
 303                                         marvell,function = "ua0";
 304                                 };
 305
 306                                 uart1_pins: uart-pins-1 {
 307                                         marvell,pins = "mpp19", "mpp20";
 308                                         marvell,function = "ua1";
 309                                 };
 310
 311                                 sdhci_pins: sdhci-pins {
 312                                         marvell,pins = "mpp48", "mpp49", "mpp50",
 313                                                        "mpp52", "mpp53", "mpp54",
 314                                                        "mpp55", "mpp57", "mpp58",
 315                                                        "mpp59";
 316                                         marvell,function = "sd0";
 317                                 };
 318
 319                                 sata0_pins: sata-pins-0 {
 320                                         marvell,pins = "mpp20";
 321                                         marvell,function = "sata0";
 322                                 };
 323
 324                                 sata1_pins: sata-pins-1 {
 325                                         marvell,pins = "mpp19";
 326                                         marvell,function = "sata1";
 327                                 };
 328
 329                                 sata2_pins: sata-pins-2 {
 330                                         marvell,pins = "mpp47";
 331                                         marvell,function = "sata2";
 332                                 };
 333
 334                                 sata3_pins: sata-pins-3 {
 335                                         marvell,pins = "mpp44";
 336                                         marvell,function = "sata3";
 337                                 };
 338                         };
 339
 340                         gpio0: gpio@18100 {
 341                                 compatible = "marvell,orion-gpio";
 342                                 reg = <0x18100 0x40>;
 343                                 ngpios = <32>;
 344                                 gpio-controller;
 345                                 #gpio-cells = <2>;
 346                                 interrupt-controller;
 347                                 #interrupt-cells = <2>;
 348                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 349                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 350                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 351                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 352                         };
 353
 354                         gpio1: gpio@18140 {
 355                                 compatible = "marvell,orion-gpio";
 356                                 reg = <0x18140 0x40>;
 357                                 ngpios = <28>;
 358                                 gpio-controller;
 359                                 #gpio-cells = <2>;
 360                                 interrupt-controller;
 361                                 #interrupt-cells = <2>;
 362                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 363                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 364                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 365                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 366                         };
 367
 368                         system-controller@18200 {
 369                                 compatible = "marvell,armada-380-system-controller",
 370                                              "marvell,armada-370-xp-system-controller";
 371                                 reg = <0x18200 0x100>;
 372                         };
 373
 374                         gateclk: clock-gating-control@18220 {
 375                                 compatible = "marvell,armada-380-gating-clock";
 376                                 reg = <0x18220 0x4>;
 377                                 clocks = <&coreclk 0>;
 378                                 #clock-cells = <1>;
 379                         };
 380
 381                         coreclk: mvebu-sar@18600 {
 382                                 compatible = "marvell,armada-380-core-clock";
 383                                 reg = <0x18600 0x04>;
 384                                 #clock-cells = <1>;
 385                         };
 386
 387                         mbusc: mbus-controller@20000 {
 388                                 compatible = "marvell,mbus-controller";
 389                                 reg = <0x20000 0x100>, <0x20180 0x20>;
 390                         };
 391
 392                         mpic: interrupt-controller@20a00 {
 393                                 compatible = "marvell,mpic";
 394                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 395                                 #interrupt-cells = <1>;
 396                                 #size-cells = <1>;
 397                                 interrupt-controller;
 398                                 msi-controller;
 399                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 400                         };
 401
 402                         timer@20300 {
 403                                 compatible = "marvell,armada-380-timer",
 404                                              "marvell,armada-xp-timer";
 405                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 406                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
 407                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
 408                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 409                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 410                                                       <&mpic 5>,
 411                                                       <&mpic 6>;
 412                                 clocks = <&coreclk 2>, <&refclk>;
 413                                 clock-names = "nbclk", "fixed";
 414                         };
 415
 416                         watchdog@20300 {
 417                                 compatible = "marvell,armada-380-wdt";
 418                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
 419                                 clocks = <&coreclk 2>, <&refclk>;
 420                                 clock-names = "nbclk", "fixed";
 421                         };
 422
 423                         cpurst@20800 {
 424                                 compatible = "marvell,armada-370-cpu-reset";
 425                                 reg = <0x20800 0x10>;
 426                         };
 427
 428                         mpcore-soc-ctrl@20d20 {
 429                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
 430                                 reg = <0x20d20 0x6c>;
 431                         };
 432
 433                         coherency-fabric@21010 {
 434                                 compatible = "marvell,armada-380-coherency-fabric";
 435                                 reg = <0x21010 0x1c>;
 436                         };
 437
 438                         pmsu@22000 {
 439                                 compatible = "marvell,armada-380-pmsu";
 440                                 reg = <0x22000 0x1000>;
 441                         };
 442
 443                         eth1: ethernet@30000 {
 444                                 compatible = "marvell,armada-370-neta";
 445                                 reg = <0x30000 0x4000>;
 446                                 interrupts-extended = <&mpic 10>;
 447                                 clocks = <&gateclk 3>;
 448                                 status = "disabled";
 449                         };
 450
 451                         eth2: ethernet@34000 {
 452                                 compatible = "marvell,armada-370-neta";
 453                                 reg = <0x34000 0x4000>;
 454                                 interrupts-extended = <&mpic 12>;
 455                                 clocks = <&gateclk 2>;
 456                                 status = "disabled";
 457                         };
 458
 459                         usb@58000 {
 460                                 compatible = "marvell,orion-ehci";
 461                                 reg = <0x58000 0x500>;
 462                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 463                                 clocks = <&gateclk 18>;
 464                                 status = "disabled";
 465                         };
 466
 467                         xor@60800 {
 468                                 compatible = "marvell,orion-xor";
 469                                 reg = <0x60800 0x100
 470                                        0x60a00 0x100>;
 471                                 clocks = <&gateclk 22>;
 472                                 status = "okay";
 473
 474                                 xor00 {
 475                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 476                                         dmacap,memcpy;
 477                                         dmacap,xor;
 478                                 };
 479                                 xor01 {
 480                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 481                                         dmacap,memcpy;
 482                                         dmacap,xor;
 483                                         dmacap,memset;
 484                                 };
 485                         };
 486
 487                         xor@60900 {
 488                                 compatible = "marvell,orion-xor";
 489                                 reg = <0x60900 0x100
 490                                        0x60b00 0x100>;
 491                                 clocks = <&gateclk 28>;
 492                                 status = "okay";
 493
 494                                 xor10 {
 495                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 496                                         dmacap,memcpy;
 497                                         dmacap,xor;
 498                                 };
 499                                 xor11 {
 500                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 501                                         dmacap,memcpy;
 502                                         dmacap,xor;
 503                                         dmacap,memset;
 504                                 };
 505                         };
 506
 507                         eth0: ethernet@70000 {
 508                                 compatible = "marvell,armada-370-neta";
 509                                 reg = <0x70000 0x4000>;
 510                                 interrupts-extended = <&mpic 8>;
 511                                 clocks = <&gateclk 4>;
 512                                 status = "disabled";
 513                         };
 514
 515                         mdio: mdio@72004 {
 516                                 #address-cells = <1>;
 517                                 #size-cells = <0>;
 518                                 compatible = "marvell,orion-mdio";
 519                                 reg = <0x72004 0x4>;
 520                                 clocks = <&gateclk 4>;
 521                         };
 522
 523                         rtc@a3800 {
 524                                 compatible = "marvell,armada-380-rtc";
 525                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
 526                                 reg-names = "rtc", "rtc-soc";
 527                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 528                         };
 529
 530                         sata@a8000 {
 531                                 compatible = "marvell,armada-380-ahci";
 532                                 reg = <0xa8000 0x2000>;
 533                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 534                                 clocks = <&gateclk 15>;
 535                                 status = "disabled";
 536                         };
 537
 538                         sata@e0000 {
 539                                 compatible = "marvell,armada-380-ahci";
 540                                 reg = <0xe0000 0x2000>;
 541                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 542                                 clocks = <&gateclk 30>;
 543                                 status = "disabled";
 544                         };
 545
 546                         coredivclk: clock@e4250 {
 547                                 compatible = "marvell,armada-380-corediv-clock";
 548                                 reg = <0xe4250 0xc>;
 549                                 #clock-cells = <1>;
 550                                 clocks = <&mainpll>;
 551                                 clock-output-names = "nand";
 552                         };
 553
 554                         thermal@e8078 {
 555                                 compatible = "marvell,armada380-thermal";
 556                                 reg = <0xe4078 0x4>, <0xe4074 0x4>;
 557                                 status = "okay";
 558                         };
 559
 560                         flash@d0000 {
 561                                 compatible = "marvell,armada370-nand","marvell,mvebu-pxa3xx-nand";
 562                                 reg = <0xd0000 0x54>;
 563                                 #address-cells = <1>;
 564                                 #size-cells = <1>;
 565                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 566                                 clocks = <&coredivclk 0>;
 567                                 status = "disabled";
 568                         };
 569
 570                         sdhci@d8000 {
 571                                 compatible = "marvell,armada-380-sdhci";
 572                                 reg-names = "sdhci", "mbus", "conf-sdio3";
 573                                 reg = <0xd8000 0x1000>,
 574                                         <0xdc000 0x100>,
 575                                         <0x18454 0x4>;
 576                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 577                                 clocks = <&gateclk 17>;
 578                                 mrvl,clk-delay-cycles = <0x1F>;
 579                                 status = "disabled";
 580                         };
 581
 582                         usb3@f0000 {
 583                                 compatible = "marvell,armada-380-xhci";
 584                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
 585                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 586                                 clocks = <&gateclk 9>;
 587                                 status = "disabled";
 588                         };
 589
 590                         usb3@f8000 {
 591                                 compatible = "marvell,armada-380-xhci";
 592                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
 593                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 594                                 clocks = <&gateclk 10>;
 595                                 status = "disabled";
 596                         };
 597                 };
 598         };
 599
 600         clocks {
 601                 /* 2 GHz fixed main PLL */
 602                 mainpll: mainpll {
 603                         compatible = "fixed-clock";
 604                         #clock-cells = <0>;
 605                         clock-frequency = <1000000000>;
 606                 };
 607
 608                 /* 25 MHz reference crystal */
 609                 refclk: oscillator {
 610                         compatible = "fixed-clock";
 611                         #clock-cells = <0>;
 612                         clock-frequency = <25000000>;
 613                 };
 614         };
 615 };