2 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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40 * OTHER DEALINGS IN THE SOFTWARE.
44 * Device Tree file for Marvell Armada 8040 Development board platform
47 #include "armada-8040.dtsi"
50 model = "Marvell Armada 8040 DB board";
51 compatible = "marvell,armada8040-db", "marvell,armada8040",
52 "marvell,armada-ap806-quad", "marvell,armada-ap806";
55 stdout-path = "serial0:115200n8";
64 device_type = "memory";
65 reg = <0x0 0x0 0x0 0x80000000>;
69 /* Accessible over the mini-USB CON9 connector on the main board */
79 /* 0 1 2 3 4 5 6 7 8 9 */
80 pin-func = < 1 1 1 1 1 1 1 1 1 1
81 1 3 0 0 0 0 0 0 0 3 >;
86 * [0-31] = 0xff: Keep default CP0_shared_pins:
87 * [11] CLKOUT_MPP_11 (out)
88 * [23] LINK_RD_IN_CP2CP (in)
89 * [25] CLKOUT_MPP_25 (out)
90 * [29] AVS_FB_IN_CP2CP (in)
92 * [31] GPIO: push button/Wake
95 * [40-41] SATA[0/1]_PRESENT_ACTIVEn
100 /* 0 1 2 3 4 5 6 7 8 9 */
101 pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
102 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
103 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
104 0xff 0 7 0 7 0 0 2 2 0
106 1 1 1 1 1 1 0xe 0xe 0xe 0xe
110 /* CON5 on CP0 expansion */
116 pinctrl-names = "default";
117 pinctrl-0 = <&cpm_i2c0_pins>;
119 clock-frequency = <100000>;
122 /* CON4 on CP0 expansion */
127 /* CON9 on CP0 expansion */
132 /* CON10 on CP0 expansion */
141 * [27,31] GE_MDIO/MDC
142 * [32-62] = 0xff: Keep default CP1_shared_pins:
144 /* 0 1 2 3 4 5 6 7 8 9 */
145 pin-func = < 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3 0x3
146 0x3 0x3 0xff 0x3 0x3 0x3 0x3 0xff 0xff 0xff
147 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x8 0xff 0xff
148 0xff 0x8 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
149 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
150 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
154 /* CON5 on CP1 expansion */
160 pinctrl-names = "default";
161 pinctrl-0 = <&cps_spi1_pins>;
165 #address-cells = <1>;
167 compatible = "jedec,spi-nor";
169 spi-max-frequency = <10000000>;
172 compatible = "fixed-partitions";
173 #address-cells = <1>;
181 label = "Filesystem";
182 reg = <0x200000 0xce0000>;
188 /* CON4 on CP1 expansion */
193 /* CON9 on CP1 expansion */
198 /* CON10 on CP1 expansion */
205 * Serdes Configuration:
214 phy-type = <PHY_TYPE_SGMII2>;
215 phy-speed = <PHY_SPEED_3_125G>;
219 phy-type = <PHY_TYPE_USB3_HOST0>;
223 phy-type = <PHY_TYPE_KR>;
227 phy-type = <PHY_TYPE_SATA1>;
231 phy-type = <PHY_TYPE_USB3_HOST1>;
235 phy-type = <PHY_TYPE_PEX2>;
241 * Serdes Configuration:
246 * Lane 4: Unconnected
250 phy-type = <PHY_TYPE_SGMII2>;
251 phy-speed = <PHY_SPEED_3_125G>;
255 phy-type = <PHY_TYPE_USB3_HOST0>;
259 phy-type = <PHY_TYPE_KR>;
263 phy-type = <PHY_TYPE_SATA1>;
267 phy-type = <PHY_TYPE_UNCONNECTED>;
271 phy-type = <PHY_TYPE_PEX2>;