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1 /*
2  * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3  *
4  *  Copyright (C) 2011 Atmel,
5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6  *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7  *
8  * Licensed under GPLv2 or later.
9  */
10
11 #include "skeleton.dtsi"
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16
17 / {
18         model = "Atmel AT91SAM9260 family SoC";
19         compatible = "atmel,at91sam9260";
20         interrupt-parent = <&aic>;
21
22         aliases {
23                 serial0 = &dbgu;
24                 serial1 = &usart0;
25                 serial2 = &usart1;
26                 serial3 = &usart2;
27                 serial4 = &usart3;
28                 serial5 = &uart0;
29                 serial6 = &uart1;
30                 gpio0 = &pioA;
31                 gpio1 = &pioB;
32                 gpio2 = &pioC;
33                 tcb0 = &tcb0;
34                 tcb1 = &tcb1;
35                 i2c0 = &i2c0;
36                 ssc0 = &ssc0;
37         };
38         cpus {
39                 #address-cells = <0>;
40                 #size-cells = <0>;
41
42                 cpu {
43                         compatible = "arm,arm926ej-s";
44                         device_type = "cpu";
45                 };
46         };
47
48         memory {
49                 reg = <0x20000000 0x04000000>;
50         };
51
52         clocks {
53                 slow_xtal: slow_xtal {
54                         compatible = "fixed-clock";
55                         #clock-cells = <0>;
56                         clock-frequency = <0>;
57                 };
58
59                 main_xtal: main_xtal {
60                         compatible = "fixed-clock";
61                         #clock-cells = <0>;
62                         clock-frequency = <0>;
63                 };
64
65                 adc_op_clk: adc_op_clk{
66                         compatible = "fixed-clock";
67                         #clock-cells = <0>;
68                         clock-frequency = <5000000>;
69                 };
70         };
71
72         sram0: sram@002ff000 {
73                 compatible = "mmio-sram";
74                 reg = <0x002ff000 0x2000>;
75         };
76
77         ahb {
78                 compatible = "simple-bus";
79                 #address-cells = <1>;
80                 #size-cells = <1>;
81                 ranges;
82
83                 apb {
84                         compatible = "simple-bus";
85                         #address-cells = <1>;
86                         #size-cells = <1>;
87                         ranges;
88
89                         aic: interrupt-controller@fffff000 {
90                                 #interrupt-cells = <3>;
91                                 compatible = "atmel,at91rm9200-aic";
92                                 interrupt-controller;
93                                 reg = <0xfffff000 0x200>;
94                                 atmel,external-irqs = <29 30 31>;
95                         };
96
97                         ramc0: ramc@ffffea00 {
98                                 compatible = "atmel,at91sam9260-sdramc";
99                                 reg = <0xffffea00 0x200>;
100                         };
101
102                         pmc: pmc@fffffc00 {
103                                 compatible = "atmel,at91sam9260-pmc", "syscon";
104                                 reg = <0xfffffc00 0x100>;
105                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
106                                 interrupt-controller;
107                                 #address-cells = <1>;
108                                 #size-cells = <0>;
109                                 #interrupt-cells = <1>;
110
111                                 main_osc: main_osc {
112                                         compatible = "atmel,at91rm9200-clk-main-osc";
113                                         #clock-cells = <0>;
114                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
115                                         clocks = <&main_xtal>;
116                                 };
117
118                                 main: mainck {
119                                         compatible = "atmel,at91rm9200-clk-main";
120                                         #clock-cells = <0>;
121                                         clocks = <&main_osc>;
122                                 };
123
124                                 slow_rc_osc: slow_rc_osc {
125                                         compatible = "fixed-clock";
126                                         #clock-cells = <0>;
127                                         clock-frequency = <32768>;
128                                         clock-accuracy = <50000000>;
129                                 };
130
131                                 clk32k: slck {
132                                         compatible = "atmel,at91sam9260-clk-slow";
133                                         #clock-cells = <0>;
134                                         clocks = <&slow_rc_osc>, <&slow_xtal>;
135                                 };
136
137                                 plla: pllack {
138                                         compatible = "atmel,at91rm9200-clk-pll";
139                                         #clock-cells = <0>;
140                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
141                                         clocks = <&main>;
142                                         reg = <0>;
143                                         atmel,clk-input-range = <1000000 32000000>;
144                                         #atmel,pll-clk-output-range-cells = <4>;
145                                         atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
146                                                                 <150000000 240000000 2 1>;
147                                 };
148
149                                 pllb: pllbck {
150                                         compatible = "atmel,at91rm9200-clk-pll";
151                                         #clock-cells = <0>;
152                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
153                                         clocks = <&main>;
154                                         reg = <1>;
155                                         atmel,clk-input-range = <1000000 5000000>;
156                                         #atmel,pll-clk-output-range-cells = <4>;
157                                         atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
158                                 };
159
160                                 mck: masterck {
161                                         compatible = "atmel,at91rm9200-clk-master";
162                                         #clock-cells = <0>;
163                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
164                                         clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
165                                         atmel,clk-output-range = <0 105000000>;
166                                         atmel,clk-divisors = <1 2 4 0>;
167                                 };
168
169                                 usb: usbck {
170                                         compatible = "atmel,at91rm9200-clk-usb";
171                                         #clock-cells = <0>;
172                                         atmel,clk-divisors = <1 2 4 0>;
173                                         clocks = <&pllb>;
174                                 };
175
176                                 prog: progck {
177                                         compatible = "atmel,at91rm9200-clk-programmable";
178                                         #address-cells = <1>;
179                                         #size-cells = <0>;
180                                         interrupt-parent = <&pmc>;
181                                         clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
182
183                                         prog0: prog0 {
184                                                 #clock-cells = <0>;
185                                                 reg = <0>;
186                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
187                                         };
188
189                                         prog1: prog1 {
190                                                 #clock-cells = <0>;
191                                                 reg = <1>;
192                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
193                                         };
194                                 };
195
196                                 systemck {
197                                         compatible = "atmel,at91rm9200-clk-system";
198                                         #address-cells = <1>;
199                                         #size-cells = <0>;
200
201                                         uhpck: uhpck {
202                                                 #clock-cells = <0>;
203                                                 reg = <6>;
204                                                 clocks = <&usb>;
205                                         };
206
207                                         udpck: udpck {
208                                                 #clock-cells = <0>;
209                                                 reg = <7>;
210                                                 clocks = <&usb>;
211                                         };
212
213                                         pck0: pck0 {
214                                                 #clock-cells = <0>;
215                                                 reg = <8>;
216                                                 clocks = <&prog0>;
217                                         };
218
219                                         pck1: pck1 {
220                                                 #clock-cells = <0>;
221                                                 reg = <9>;
222                                                 clocks = <&prog1>;
223                                         };
224                                 };
225
226                                 periphck {
227                                         compatible = "atmel,at91rm9200-clk-peripheral";
228                                         #address-cells = <1>;
229                                         #size-cells = <0>;
230                                         clocks = <&mck>;
231
232                                         pioA_clk: pioA_clk {
233                                                 #clock-cells = <0>;
234                                                 reg = <2>;
235                                         };
236
237                                         pioB_clk: pioB_clk {
238                                                 #clock-cells = <0>;
239                                                 reg = <3>;
240                                         };
241
242                                         pioC_clk: pioC_clk {
243                                                 #clock-cells = <0>;
244                                                 reg = <4>;
245                                         };
246
247                                         adc_clk: adc_clk {
248                                                 #clock-cells = <0>;
249                                                 reg = <5>;
250                                         };
251
252                                         usart0_clk: usart0_clk {
253                                                 #clock-cells = <0>;
254                                                 reg = <6>;
255                                         };
256
257                                         usart1_clk: usart1_clk {
258                                                 #clock-cells = <0>;
259                                                 reg = <7>;
260                                         };
261
262                                         usart2_clk: usart2_clk {
263                                                 #clock-cells = <0>;
264                                                 reg = <8>;
265                                         };
266
267                                         mci0_clk: mci0_clk {
268                                                 #clock-cells = <0>;
269                                                 reg = <9>;
270                                         };
271
272                                         udc_clk: udc_clk {
273                                                 #clock-cells = <0>;
274                                                 reg = <10>;
275                                         };
276
277                                         twi0_clk: twi0_clk {
278                                                 reg = <11>;
279                                                 #clock-cells = <0>;
280                                         };
281
282                                         spi0_clk: spi0_clk {
283                                                 #clock-cells = <0>;
284                                                 reg = <12>;
285                                         };
286
287                                         spi1_clk: spi1_clk {
288                                                 #clock-cells = <0>;
289                                                 reg = <13>;
290                                         };
291
292                                         ssc0_clk: ssc0_clk {
293                                                 #clock-cells = <0>;
294                                                 reg = <14>;
295                                         };
296
297                                         tc0_clk: tc0_clk {
298                                                 #clock-cells = <0>;
299                                                 reg = <17>;
300                                         };
301
302                                         tc1_clk: tc1_clk {
303                                                 #clock-cells = <0>;
304                                                 reg = <18>;
305                                         };
306
307                                         tc2_clk: tc2_clk {
308                                                 #clock-cells = <0>;
309                                                 reg = <19>;
310                                         };
311
312                                         ohci_clk: ohci_clk {
313                                                 #clock-cells = <0>;
314                                                 reg = <20>;
315                                         };
316
317                                         macb0_clk: macb0_clk {
318                                                 #clock-cells = <0>;
319                                                 reg = <21>;
320                                         };
321
322                                         isi_clk: isi_clk {
323                                                 #clock-cells = <0>;
324                                                 reg = <22>;
325                                         };
326
327                                         usart3_clk: usart3_clk {
328                                                 #clock-cells = <0>;
329                                                 reg = <23>;
330                                         };
331
332                                         uart0_clk: uart0_clk {
333                                                 #clock-cells = <0>;
334                                                 reg = <24>;
335                                         };
336
337                                         uart1_clk: uart1_clk {
338                                                 #clock-cells = <0>;
339                                                 reg = <25>;
340                                         };
341
342                                         tc3_clk: tc3_clk {
343                                                 #clock-cells = <0>;
344                                                 reg = <26>;
345                                         };
346
347                                         tc4_clk: tc4_clk {
348                                                 #clock-cells = <0>;
349                                                 reg = <27>;
350                                         };
351
352                                         tc5_clk: tc5_clk {
353                                                 #clock-cells = <0>;
354                                                 reg = <28>;
355                                         };
356                                 };
357                         };
358
359                         rstc@fffffd00 {
360                                 compatible = "atmel,at91sam9260-rstc";
361                                 reg = <0xfffffd00 0x10>;
362                                 clocks = <&clk32k>;
363                         };
364
365                         shdwc@fffffd10 {
366                                 compatible = "atmel,at91sam9260-shdwc";
367                                 reg = <0xfffffd10 0x10>;
368                                 clocks = <&clk32k>;
369                         };
370
371                         pit: timer@fffffd30 {
372                                 compatible = "atmel,at91sam9260-pit";
373                                 reg = <0xfffffd30 0xf>;
374                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
375                                 clocks = <&mck>;
376                         };
377
378                         tcb0: timer@fffa0000 {
379                                 compatible = "atmel,at91rm9200-tcb";
380                                 reg = <0xfffa0000 0x100>;
381                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
382                                               18 IRQ_TYPE_LEVEL_HIGH 0
383                                               19 IRQ_TYPE_LEVEL_HIGH 0>;
384                                 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
385                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
386                         };
387
388                         tcb1: timer@fffdc000 {
389                                 compatible = "atmel,at91rm9200-tcb";
390                                 reg = <0xfffdc000 0x100>;
391                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
392                                               27 IRQ_TYPE_LEVEL_HIGH 0
393                                               28 IRQ_TYPE_LEVEL_HIGH 0>;
394                                 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
395                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
396                         };
397
398                         pinctrl@fffff400 {
399                                 #address-cells = <1>;
400                                 #size-cells = <1>;
401                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
402                                 ranges = <0xfffff400 0xfffff400 0x600>;
403
404                                 atmel,mux-mask = <
405                                       /*    A         B     */
406                                        0xffffffff 0xffc00c3b  /* pioA */
407                                        0xffffffff 0x7fff3ccf  /* pioB */
408                                        0xffffffff 0x007fffff  /* pioC */
409                                       >;
410
411                                 /* shared pinctrl settings */
412                                 dbgu {
413                                         pinctrl_dbgu: dbgu-0 {
414                                                 atmel,pins =
415                                                         <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A */
416                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB15 periph with pullup */
417                                         };
418                                 };
419
420                                 usart0 {
421                                         pinctrl_usart0: usart0-0 {
422                                                 atmel,pins =
423                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A */
424                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
425                                         };
426
427                                         pinctrl_usart0_rts: usart0_rts-0 {
428                                                 atmel,pins =
429                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
430                                         };
431
432                                         pinctrl_usart0_cts: usart0_cts-0 {
433                                                 atmel,pins =
434                                                         <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
435                                         };
436
437                                         pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
438                                                 atmel,pins =
439                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A */
440                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
441                                         };
442
443                                         pinctrl_usart0_dcd: usart0_dcd-0 {
444                                                 atmel,pins =
445                                                         <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
446                                         };
447
448                                         pinctrl_usart0_ri: usart0_ri-0 {
449                                                 atmel,pins =
450                                                         <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
451                                         };
452                                 };
453
454                                 usart1 {
455                                         pinctrl_usart1: usart1-0 {
456                                                 atmel,pins =
457                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
458                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A */
459                                         };
460
461                                         pinctrl_usart1_rts: usart1_rts-0 {
462                                                 atmel,pins =
463                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
464                                         };
465
466                                         pinctrl_usart1_cts: usart1_cts-0 {
467                                                 atmel,pins =
468                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
469                                         };
470                                 };
471
472                                 usart2 {
473                                         pinctrl_usart2: usart2-0 {
474                                                 atmel,pins =
475                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
476                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB9 periph A */
477                                         };
478
479                                         pinctrl_usart2_rts: usart2_rts-0 {
480                                                 atmel,pins =
481                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
482                                         };
483
484                                         pinctrl_usart2_cts: usart2_cts-0 {
485                                                 atmel,pins =
486                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
487                                         };
488                                 };
489
490                                 usart3 {
491                                         pinctrl_usart3: usart3-0 {
492                                                 atmel,pins =
493                                                         <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB10 periph A with pullup */
494                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
495                                         };
496
497                                         pinctrl_usart3_rts: usart3_rts-0 {
498                                                 atmel,pins =
499                                                         <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500                                         };
501
502                                         pinctrl_usart3_cts: usart3_cts-0 {
503                                                 atmel,pins =
504                                                         <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
505                                         };
506                                 };
507
508                                 uart0 {
509                                         pinctrl_uart0: uart0-0 {
510                                                 atmel,pins =
511                                                         <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA31 periph B with pullup */
512                                                          AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
513                                         };
514                                 };
515
516                                 uart1 {
517                                         pinctrl_uart1: uart1-0 {
518                                                 atmel,pins =
519                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB12 periph A with pullup */
520                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
521                                         };
522                                 };
523
524                                 nand {
525                                         pinctrl_nand: nand-0 {
526                                                 atmel,pins =
527                                                         <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP     /* PC13 gpio RDY pin pull_up */
528                                                          AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PC14 gpio enable pin pull_up */
529                                         };
530                                 };
531
532                                 macb {
533                                         pinctrl_macb_rmii: macb_rmii-0 {
534                                                 atmel,pins =
535                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
536                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
537                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
538                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
539                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
540                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
541                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
542                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA19 periph A */
543                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA20 periph A */
544                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
545                                         };
546
547                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
548                                                 atmel,pins =
549                                                         <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B */
550                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA23 periph B */
551                                                          AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
552                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
553                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA26 periph B */
554                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
555                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
556                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
557                                         };
558
559                                         pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
560                                                 atmel,pins =
561                                                         <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA10 periph B */
562                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA11 periph B */
563                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B */
564                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
565                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA26 periph B */
566                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
567                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
568                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
569                                         };
570                                 };
571
572                                 mmc0 {
573                                         pinctrl_mmc0_clk: mmc0_clk-0 {
574                                                 atmel,pins =
575                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
576                                         };
577
578                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
579                                                 atmel,pins =
580                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
581                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA6 periph A with pullup */
582                                         };
583
584                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
585                                                 atmel,pins =
586                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
587                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA10 periph A with pullup */
588                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA11 periph A with pullup */
589                                         };
590
591                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
592                                                 atmel,pins =
593                                                         <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
594                                                          AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA0 periph B with pullup */
595                                         };
596
597                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
598                                                 atmel,pins =
599                                                         <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
600                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
601                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA3 periph B with pullup */
602                                         };
603                                 };
604
605                                 ssc0 {
606                                         pinctrl_ssc0_tx: ssc0_tx-0 {
607                                                 atmel,pins =
608                                                         <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A */
609                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A */
610                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
611                                         };
612
613                                         pinctrl_ssc0_rx: ssc0_rx-0 {
614                                                 atmel,pins =
615                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB19 periph A */
616                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB20 periph A */
617                                                          AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
618                                         };
619                                 };
620
621                                 spi0 {
622                                         pinctrl_spi0: spi0-0 {
623                                                 atmel,pins =
624                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A SPI0_MISO pin */
625                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A SPI0_MOSI pin */
626                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A SPI0_SPCK pin */
627                                         };
628                                 };
629
630                                 spi1 {
631                                         pinctrl_spi1: spi1-0 {
632                                                 atmel,pins =
633                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI1_MISO pin */
634                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI1_MOSI pin */
635                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI1_SPCK pin */
636                                         };
637                                 };
638
639                                 i2c_gpio0 {
640                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
641                                                 atmel,pins =
642                                                         <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
643                                                          AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
644                                         };
645                                 };
646
647                                 tcb0 {
648                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
649                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
650                                         };
651
652                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
653                                                 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
654                                         };
655
656                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
657                                                 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
658                                         };
659
660                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
661                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
662                                         };
663
664                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
665                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
666                                         };
667
668                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
669                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
670                                         };
671
672                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
673                                                 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
674                                         };
675
676                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
677                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
678                                         };
679
680                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
681                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
682                                         };
683                                 };
684
685                                 tcb1 {
686                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
687                                                 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
688                                         };
689
690                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
691                                                 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
692                                         };
693
694                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
695                                                 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
696                                         };
697
698                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
699                                                 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
700                                         };
701
702                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
703                                                 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
704                                         };
705
706                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
707                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
708                                         };
709
710                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
711                                                 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
712                                         };
713
714                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
715                                                 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
716                                         };
717
718                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
719                                                 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
720                                         };
721                                 };
722
723                                 pioA: gpio@fffff400 {
724                                         compatible = "atmel,at91rm9200-gpio";
725                                         reg = <0xfffff400 0x200>;
726                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
727                                         #gpio-cells = <2>;
728                                         gpio-controller;
729                                         interrupt-controller;
730                                         #interrupt-cells = <2>;
731                                         clocks = <&pioA_clk>;
732                                 };
733
734                                 pioB: gpio@fffff600 {
735                                         compatible = "atmel,at91rm9200-gpio";
736                                         reg = <0xfffff600 0x200>;
737                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
738                                         #gpio-cells = <2>;
739                                         gpio-controller;
740                                         interrupt-controller;
741                                         #interrupt-cells = <2>;
742                                         clocks = <&pioB_clk>;
743                                 };
744
745                                 pioC: gpio@fffff800 {
746                                         compatible = "atmel,at91rm9200-gpio";
747                                         reg = <0xfffff800 0x200>;
748                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
749                                         #gpio-cells = <2>;
750                                         gpio-controller;
751                                         interrupt-controller;
752                                         #interrupt-cells = <2>;
753                                         clocks = <&pioC_clk>;
754                                 };
755                         };
756
757                         dbgu: serial@fffff200 {
758                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
759                                 reg = <0xfffff200 0x200>;
760                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
761                                 pinctrl-names = "default";
762                                 pinctrl-0 = <&pinctrl_dbgu>;
763                                 clocks = <&mck>;
764                                 clock-names = "usart";
765                                 status = "disabled";
766                         };
767
768                         usart0: serial@fffb0000 {
769                                 compatible = "atmel,at91sam9260-usart";
770                                 reg = <0xfffb0000 0x200>;
771                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
772                                 atmel,use-dma-rx;
773                                 atmel,use-dma-tx;
774                                 pinctrl-names = "default";
775                                 pinctrl-0 = <&pinctrl_usart0>;
776                                 clocks = <&usart0_clk>;
777                                 clock-names = "usart";
778                                 status = "disabled";
779                         };
780
781                         usart1: serial@fffb4000 {
782                                 compatible = "atmel,at91sam9260-usart";
783                                 reg = <0xfffb4000 0x200>;
784                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
785                                 atmel,use-dma-rx;
786                                 atmel,use-dma-tx;
787                                 pinctrl-names = "default";
788                                 pinctrl-0 = <&pinctrl_usart1>;
789                                 clocks = <&usart1_clk>;
790                                 clock-names = "usart";
791                                 status = "disabled";
792                         };
793
794                         usart2: serial@fffb8000 {
795                                 compatible = "atmel,at91sam9260-usart";
796                                 reg = <0xfffb8000 0x200>;
797                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
798                                 atmel,use-dma-rx;
799                                 atmel,use-dma-tx;
800                                 pinctrl-names = "default";
801                                 pinctrl-0 = <&pinctrl_usart2>;
802                                 clocks = <&usart2_clk>;
803                                 clock-names = "usart";
804                                 status = "disabled";
805                         };
806
807                         usart3: serial@fffd0000 {
808                                 compatible = "atmel,at91sam9260-usart";
809                                 reg = <0xfffd0000 0x200>;
810                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
811                                 atmel,use-dma-rx;
812                                 atmel,use-dma-tx;
813                                 pinctrl-names = "default";
814                                 pinctrl-0 = <&pinctrl_usart3>;
815                                 clocks = <&usart3_clk>;
816                                 clock-names = "usart";
817                                 status = "disabled";
818                         };
819
820                         uart0: serial@fffd4000 {
821                                 compatible = "atmel,at91sam9260-usart";
822                                 reg = <0xfffd4000 0x200>;
823                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
824                                 atmel,use-dma-rx;
825                                 atmel,use-dma-tx;
826                                 pinctrl-names = "default";
827                                 pinctrl-0 = <&pinctrl_uart0>;
828                                 clocks = <&uart0_clk>;
829                                 clock-names = "usart";
830                                 status = "disabled";
831                         };
832
833                         uart1: serial@fffd8000 {
834                                 compatible = "atmel,at91sam9260-usart";
835                                 reg = <0xfffd8000 0x200>;
836                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
837                                 atmel,use-dma-rx;
838                                 atmel,use-dma-tx;
839                                 pinctrl-names = "default";
840                                 pinctrl-0 = <&pinctrl_uart1>;
841                                 clocks = <&uart1_clk>;
842                                 clock-names = "usart";
843                                 status = "disabled";
844                         };
845
846                         macb0: ethernet@fffc4000 {
847                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
848                                 reg = <0xfffc4000 0x100>;
849                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
850                                 pinctrl-names = "default";
851                                 pinctrl-0 = <&pinctrl_macb_rmii>;
852                                 clocks = <&macb0_clk>, <&macb0_clk>;
853                                 clock-names = "hclk", "pclk";
854                                 status = "disabled";
855                         };
856
857                         usb1: gadget@fffa4000 {
858                                 compatible = "atmel,at91sam9260-udc";
859                                 reg = <0xfffa4000 0x4000>;
860                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
861                                 clocks = <&udc_clk>, <&udpck>;
862                                 clock-names = "pclk", "hclk";
863                                 status = "disabled";
864                         };
865
866                         i2c0: i2c@fffac000 {
867                                 compatible = "atmel,at91sam9260-i2c";
868                                 reg = <0xfffac000 0x100>;
869                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
870                                 #address-cells = <1>;
871                                 #size-cells = <0>;
872                                 clocks = <&twi0_clk>;
873                                 status = "disabled";
874                         };
875
876                         mmc0: mmc@fffa8000 {
877                                 compatible = "atmel,hsmci";
878                                 reg = <0xfffa8000 0x600>;
879                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
880                                 #address-cells = <1>;
881                                 #size-cells = <0>;
882                                 pinctrl-names = "default";
883                                 clocks = <&mci0_clk>;
884                                 clock-names = "mci_clk";
885                                 status = "disabled";
886                         };
887
888                         ssc0: ssc@fffbc000 {
889                                 compatible = "atmel,at91rm9200-ssc";
890                                 reg = <0xfffbc000 0x4000>;
891                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
892                                 pinctrl-names = "default";
893                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
894                                 clocks = <&ssc0_clk>;
895                                 clock-names = "pclk";
896                                 status = "disabled";
897                         };
898
899                         spi0: spi@fffc8000 {
900                                 #address-cells = <1>;
901                                 #size-cells = <0>;
902                                 compatible = "atmel,at91rm9200-spi";
903                                 reg = <0xfffc8000 0x200>;
904                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
905                                 pinctrl-names = "default";
906                                 pinctrl-0 = <&pinctrl_spi0>;
907                                 clocks = <&spi0_clk>;
908                                 clock-names = "spi_clk";
909                                 status = "disabled";
910                         };
911
912                         spi1: spi@fffcc000 {
913                                 #address-cells = <1>;
914                                 #size-cells = <0>;
915                                 compatible = "atmel,at91rm9200-spi";
916                                 reg = <0xfffcc000 0x200>;
917                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
918                                 pinctrl-names = "default";
919                                 pinctrl-0 = <&pinctrl_spi1>;
920                                 clocks = <&spi1_clk>;
921                                 clock-names = "spi_clk";
922                                 status = "disabled";
923                         };
924
925                         adc0: adc@fffe0000 {
926                                 #address-cells = <1>;
927                                 #size-cells = <0>;
928                                 compatible = "atmel,at91sam9260-adc";
929                                 reg = <0xfffe0000 0x100>;
930                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
931                                 clocks = <&adc_clk>, <&adc_op_clk>;
932                                 clock-names = "adc_clk", "adc_op_clk";
933                                 atmel,adc-use-external-triggers;
934                                 atmel,adc-channels-used = <0xf>;
935                                 atmel,adc-vref = <3300>;
936                                 atmel,adc-startup-time = <15>;
937                                 atmel,adc-res = <8 10>;
938                                 atmel,adc-res-names = "lowres", "highres";
939                                 atmel,adc-use-res = "highres";
940
941                                 trigger@0 {
942                                         reg = <0>;
943                                         trigger-name = "timer-counter-0";
944                                         trigger-value = <0x1>;
945                                 };
946                                 trigger@1 {
947                                         reg = <1>;
948                                         trigger-name = "timer-counter-1";
949                                         trigger-value = <0x3>;
950                                 };
951
952                                 trigger@2 {
953                                         reg = <2>;
954                                         trigger-name = "timer-counter-2";
955                                         trigger-value = <0x5>;
956                                 };
957
958                                 trigger@3 {
959                                         reg = <3>;
960                                         trigger-name = "external";
961                                         trigger-value = <0xd>;
962                                         trigger-external;
963                                 };
964                         };
965
966                         rtc@fffffd20 {
967                                 compatible = "atmel,at91sam9260-rtt";
968                                 reg = <0xfffffd20 0x10>;
969                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
970                                 clocks = <&clk32k>;
971                                 status = "disabled";
972                         };
973
974                         watchdog@fffffd40 {
975                                 compatible = "atmel,at91sam9260-wdt";
976                                 reg = <0xfffffd40 0x10>;
977                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
978                                 clocks = <&clk32k>;
979                                 atmel,watchdog-type = "hardware";
980                                 atmel,reset-type = "all";
981                                 atmel,dbg-halt;
982                                 status = "disabled";
983                         };
984
985                         gpbr: syscon@fffffd50 {
986                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
987                                 reg = <0xfffffd50 0x10>;
988                                 status = "disabled";
989                         };
990                 };
991
992                 nand0: nand@40000000 {
993                         compatible = "atmel,at91rm9200-nand";
994                         #address-cells = <1>;
995                         #size-cells = <1>;
996                         reg = <0x40000000 0x10000000
997                                0xffffe800 0x200
998                               >;
999                         atmel,nand-addr-offset = <21>;
1000                         atmel,nand-cmd-offset = <22>;
1001                         pinctrl-names = "default";
1002                         pinctrl-0 = <&pinctrl_nand>;
1003                         gpios = <&pioC 13 GPIO_ACTIVE_HIGH
1004                                  &pioC 14 GPIO_ACTIVE_HIGH
1005                                  0
1006                                 >;
1007                         status = "disabled";
1008                 };
1009
1010                 usb0: ohci@00500000 {
1011                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1012                         reg = <0x00500000 0x100000>;
1013                         interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1014                         clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1015                         clock-names = "ohci_clk", "hclk", "uhpck";
1016                         status = "disabled";
1017                 };
1018         };
1019
1020         i2c@0 {
1021                 compatible = "i2c-gpio";
1022                 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
1023                          &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1024                         >;
1025                 i2c-gpio,sda-open-drain;
1026                 i2c-gpio,scl-open-drain;
1027                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1028                 #address-cells = <1>;
1029                 #size-cells = <0>;
1030                 pinctrl-names = "default";
1031                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1032                 status = "disabled";
1033         };
1034 };