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1 /*
2  * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3  *
4  *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5  *
6  * Licensed under GPLv2 only.
7  */
8
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14
15 / {
16         model = "Atmel AT91SAM9263 family SoC";
17         compatible = "atmel,at91sam9263";
18         interrupt-parent = <&aic>;
19
20         aliases {
21                 serial0 = &dbgu;
22                 serial1 = &usart0;
23                 serial2 = &usart1;
24                 serial3 = &usart2;
25                 gpio0 = &pioA;
26                 gpio1 = &pioB;
27                 gpio2 = &pioC;
28                 gpio3 = &pioD;
29                 gpio4 = &pioE;
30                 tcb0 = &tcb0;
31                 i2c0 = &i2c0;
32                 ssc0 = &ssc0;
33                 ssc1 = &ssc1;
34                 pwm0 = &pwm0;
35         };
36
37         cpus {
38                 #address-cells = <0>;
39                 #size-cells = <0>;
40
41                 cpu {
42                         compatible = "arm,arm926ej-s";
43                         device_type = "cpu";
44                 };
45         };
46
47         memory {
48                 reg = <0x20000000 0x08000000>;
49         };
50
51         clocks {
52                 main_xtal: main_xtal {
53                         compatible = "fixed-clock";
54                         #clock-cells = <0>;
55                         clock-frequency = <0>;
56                 };
57
58                 slow_xtal: slow_xtal {
59                         compatible = "fixed-clock";
60                         #clock-cells = <0>;
61                         clock-frequency = <0>;
62                 };
63         };
64
65         sram0: sram@00300000 {
66                 compatible = "mmio-sram";
67                 reg = <0x00300000 0x14000>;
68         };
69
70         sram1: sram@00500000 {
71                 compatible = "mmio-sram";
72                 reg = <0x00500000 0x4000>;
73         };
74
75         ahb {
76                 compatible = "simple-bus";
77                 #address-cells = <1>;
78                 #size-cells = <1>;
79                 ranges;
80                 u-boot,dm-pre-reloc;
81
82                 apb {
83                         compatible = "simple-bus";
84                         #address-cells = <1>;
85                         #size-cells = <1>;
86                         ranges;
87                         u-boot,dm-pre-reloc;
88
89                         aic: interrupt-controller@fffff000 {
90                                 #interrupt-cells = <3>;
91                                 compatible = "atmel,at91rm9200-aic";
92                                 interrupt-controller;
93                                 reg = <0xfffff000 0x200>;
94                                 atmel,external-irqs = <30 31>;
95                         };
96
97                         pmc: pmc@fffffc00 {
98                                 compatible = "atmel,at91rm9200-pmc", "syscon";
99                                 reg = <0xfffffc00 0x100>;
100                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
101                                 interrupt-controller;
102                                 #address-cells = <1>;
103                                 #size-cells = <0>;
104                                 #interrupt-cells = <1>;
105                                 u-boot,dm-pre-reloc;
106
107                                 main_osc: main_osc {
108                                         compatible = "atmel,at91rm9200-clk-main-osc";
109                                         #clock-cells = <0>;
110                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
111                                         clocks = <&main_xtal>;
112                                 };
113
114                                 main: mainck {
115                                         compatible = "atmel,at91rm9200-clk-main";
116                                         #clock-cells = <0>;
117                                         clocks = <&main_osc>;
118                                 };
119
120                                 plla: pllack@0 {
121                                         compatible = "atmel,at91rm9200-clk-pll";
122                                         #clock-cells = <0>;
123                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
124                                         clocks = <&main>;
125                                         reg = <0>;
126                                         atmel,clk-input-range = <1000000 32000000>;
127                                         #atmel,pll-clk-output-range-cells = <4>;
128                                         atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
129                                                                 <190000000 240000000 2 1>;
130                                 };
131
132                                 pllb: pllbck@1 {
133                                         compatible = "atmel,at91rm9200-clk-pll";
134                                         #clock-cells = <0>;
135                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
136                                         clocks = <&main>;
137                                         reg = <1>;
138                                         atmel,clk-input-range = <1000000 32000000>;
139                                         #atmel,pll-clk-output-range-cells = <4>;
140                                         atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
141                                                                 <190000000 240000000 2 1>;
142                                 };
143
144                                 mck: masterck {
145                                         compatible = "atmel,at91rm9200-clk-master";
146                                         #clock-cells = <0>;
147                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
148                                         clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
149                                         atmel,clk-output-range = <0 120000000>;
150                                         atmel,clk-divisors = <1 2 4 0>;
151                                         u-boot,dm-pre-reloc;
152                                 };
153
154                                 usb: usbck {
155                                         compatible = "atmel,at91rm9200-clk-usb";
156                                         #clock-cells = <0>;
157                                         atmel,clk-divisors = <1 2 4 0>;
158                                         clocks = <&pllb>;
159                                 };
160
161                                 prog: progck {
162                                         compatible = "atmel,at91rm9200-clk-programmable";
163                                         #address-cells = <1>;
164                                         #size-cells = <0>;
165                                         interrupt-parent = <&pmc>;
166                                         clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
167
168                                         prog0: prog@0 {
169                                                 #clock-cells = <0>;
170                                                 reg = <0>;
171                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
172                                         };
173
174                                         prog1: prog@1 {
175                                                 #clock-cells = <0>;
176                                                 reg = <1>;
177                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
178                                         };
179
180                                         prog2: prog@2 {
181                                                 #clock-cells = <0>;
182                                                 reg = <2>;
183                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
184                                         };
185
186                                         prog3: prog@3 {
187                                                 #clock-cells = <0>;
188                                                 reg = <3>;
189                                                 interrupts = <AT91_PMC_PCKRDY(3)>;
190                                         };
191                                 };
192
193                                 systemck {
194                                         compatible = "atmel,at91rm9200-clk-system";
195                                         #address-cells = <1>;
196                                         #size-cells = <0>;
197
198                                         uhpck: uhpck@6 {
199                                                 #clock-cells = <0>;
200                                                 reg = <6>;
201                                                 clocks = <&usb>;
202                                         };
203
204                                         udpck: udpck@7 {
205                                                 #clock-cells = <0>;
206                                                 reg = <7>;
207                                                 clocks = <&usb>;
208                                         };
209
210                                         pck0: pck0@8 {
211                                                 #clock-cells = <0>;
212                                                 reg = <8>;
213                                                 clocks = <&prog0>;
214                                         };
215
216                                         pck1: pck1@9 {
217                                                 #clock-cells = <0>;
218                                                 reg = <9>;
219                                                 clocks = <&prog1>;
220                                         };
221
222                                         pck2: pck2@10 {
223                                                 #clock-cells = <0>;
224                                                 reg = <10>;
225                                                 clocks = <&prog2>;
226                                         };
227
228                                         pck3: pck3@11 {
229                                                 #clock-cells = <0>;
230                                                 reg = <11>;
231                                                 clocks = <&prog3>;
232                                         };
233                                 };
234
235                                 periphck {
236                                         compatible = "atmel,at91rm9200-clk-peripheral";
237                                         #address-cells = <1>;
238                                         #size-cells = <0>;
239                                         clocks = <&mck>;
240                                         u-boot,dm-pre-reloc;
241
242                                         pioA_clk: pioA_clk@2 {
243                                                 #clock-cells = <0>;
244                                                 reg = <2>;
245                                                 u-boot,dm-pre-reloc;
246                                         };
247
248                                         pioB_clk: pioB_clk@3 {
249                                                 #clock-cells = <0>;
250                                                 reg = <3>;
251                                                 u-boot,dm-pre-reloc;
252                                         };
253
254                                         pioCDE_clk: pioCDE_clk@4 {
255                                                 #clock-cells = <0>;
256                                                 reg = <4>;
257                                                 u-boot,dm-pre-reloc;
258                                         };
259
260                                         usart0_clk: usart0_clk@7 {
261                                                 #clock-cells = <0>;
262                                                 reg = <7>;
263                                         };
264
265                                         usart1_clk: usart1_clk@8 {
266                                                 #clock-cells = <0>;
267                                                 reg = <8>;
268                                         };
269
270                                         usart2_clk: usart2_clk@9 {
271                                                 #clock-cells = <0>;
272                                                 reg = <9>;
273                                         };
274
275                                         mci0_clk: mci0_clk@10 {
276                                                 #clock-cells = <0>;
277                                                 reg = <10>;
278                                         };
279
280                                         mci1_clk: mci1_clk@11 {
281                                                 #clock-cells = <0>;
282                                                 reg = <11>;
283                                         };
284
285                                         can_clk: can_clk@12 {
286                                                 #clock-cells = <0>;
287                                                 reg = <12>;
288                                         };
289
290                                         twi0_clk: twi0_clk@13 {
291                                                 #clock-cells = <0>;
292                                                 reg = <13>;
293                                         };
294
295                                         spi0_clk: spi0_clk@14 {
296                                                 #clock-cells = <0>;
297                                                 reg = <14>;
298                                         };
299
300                                         spi1_clk: spi1_clk@15 {
301                                                 #clock-cells = <0>;
302                                                 reg = <15>;
303                                         };
304
305                                         ssc0_clk: ssc0_clk@16 {
306                                                 #clock-cells = <0>;
307                                                 reg = <16>;
308                                         };
309
310                                         ssc1_clk: ssc1_clk@17 {
311                                                 #clock-cells = <0>;
312                                                 reg = <17>;
313                                         };
314
315                                         ac97_clk: ac97_clk@18 {
316                                                 #clock-cells = <0>;
317                                                 reg = <18>;
318                                         };
319
320                                         tcb_clk: tcb_clk@19 {
321                                                 #clock-cells = <0>;
322                                                 reg = <19>;
323                                         };
324
325                                         pwm_clk: pwm_clk@20 {
326                                                 #clock-cells = <0>;
327                                                 reg = <20>;
328                                         };
329
330                                         macb0_clk: macb0_clk@21 {
331                                                 #clock-cells = <0>;
332                                                 reg = <21>;
333                                         };
334
335                                         g2de_clk: g2de_clk@23 {
336                                                 #clock-cells = <0>;
337                                                 reg = <23>;
338                                         };
339
340                                         udc_clk: udc_clk@24 {
341                                                 #clock-cells = <0>;
342                                                 reg = <24>;
343                                         };
344
345                                         isi_clk: isi_clk@25 {
346                                                 #clock-cells = <0>;
347                                                 reg = <25>;
348                                         };
349
350                                         lcd_clk: lcd_clk@26 {
351                                                 #clock-cells = <0>;
352                                                 reg = <26>;
353                                         };
354
355                                         dma_clk: dma_clk@27 {
356                                                 #clock-cells = <0>;
357                                                 reg = <27>;
358                                         };
359
360                                         ohci_clk: ohci_clk@29 {
361                                                 #clock-cells = <0>;
362                                                 reg = <29>;
363                                         };
364                                 };
365                         };
366
367                         ramc0: ramc@ffffe200 {
368                                 compatible = "atmel,at91sam9260-sdramc";
369                                 reg = <0xffffe200 0x200>;
370                         };
371
372                         ramc1: ramc@ffffe800 {
373                                 compatible = "atmel,at91sam9260-sdramc";
374                                 reg = <0xffffe800 0x200>;
375                         };
376
377                         pit: timer@fffffd30 {
378                                 compatible = "atmel,at91sam9260-pit";
379                                 reg = <0xfffffd30 0xf>;
380                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
381                                 clocks = <&mck>;
382                         };
383
384                         tcb0: timer@fff7c000 {
385                                 compatible = "atmel,at91rm9200-tcb";
386                                 reg = <0xfff7c000 0x100>;
387                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
388                                 clocks = <&tcb_clk>, <&slow_xtal>;
389                                 clock-names = "t0_clk", "slow_clk";
390                         };
391
392                         rstc@fffffd00 {
393                                 compatible = "atmel,at91sam9260-rstc";
394                                 reg = <0xfffffd00 0x10>;
395                                 clocks = <&slow_xtal>;
396                         };
397
398                         shdwc@fffffd10 {
399                                 compatible = "atmel,at91sam9260-shdwc";
400                                 reg = <0xfffffd10 0x10>;
401                                 clocks = <&slow_xtal>;
402                         };
403
404                         pinctrl@fffff200 {
405                                 #address-cells = <1>;
406                                 #size-cells = <1>;
407                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
408                                 ranges = <0xfffff200 0xfffff200 0xa00>;
409                                 reg = <0xfffff200 0x200
410                                        0xfffff400 0x200
411                                        0xfffff600 0x200
412                                        0xfffff800 0x200
413                                        0xfffffa00 0x200
414                                       >;
415
416                                 atmel,mux-mask = <
417                                       /*    A         B     */
418                                        0xfffffffb 0xffffe07f  /* pioA */
419                                        0x0007ffff 0x39072fff  /* pioB */
420                                        0xffffffff 0x3ffffff8  /* pioC */
421                                        0xfffffbff 0xffffffff  /* pioD */
422                                        0xffe00fff 0xfbfcff00  /* pioE */
423                                       >;
424
425                                 /* shared pinctrl settings */
426                                 dbgu {
427                                         pinctrl_dbgu: dbgu-0 {
428                                                 atmel,pins =
429                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
430                                                          AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
431                                         };
432                                 };
433
434                                 usart0 {
435                                         pinctrl_usart0: usart0-0 {
436                                                 atmel,pins =
437                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA26 periph A with pullup */
438                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
439                                         };
440
441                                         pinctrl_usart0_rts: usart0_rts-0 {
442                                                 atmel,pins =
443                                                         <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
444                                         };
445
446                                         pinctrl_usart0_cts: usart0_cts-0 {
447                                                 atmel,pins =
448                                                         <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
449                                         };
450                                 };
451
452                                 usart1 {
453                                         pinctrl_usart1: usart1-0 {
454                                                 atmel,pins =
455                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
456                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD1 periph A */
457                                         };
458
459                                         pinctrl_usart1_rts: usart1_rts-0 {
460                                                 atmel,pins =
461                                                         <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD7 periph B */
462                                         };
463
464                                         pinctrl_usart1_cts: usart1_cts-0 {
465                                                 atmel,pins =
466                                                         <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD8 periph B */
467                                         };
468                                 };
469
470                                 usart2 {
471                                         pinctrl_usart2: usart2-0 {
472                                                 atmel,pins =
473                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
474                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD3 periph A */
475                                         };
476
477                                         pinctrl_usart2_rts: usart2_rts-0 {
478                                                 atmel,pins =
479                                                         <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD5 periph B */
480                                         };
481
482                                         pinctrl_usart2_cts: usart2_cts-0 {
483                                                 atmel,pins =
484                                                         <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD6 periph B */
485                                         };
486                                 };
487
488                                 nand {
489                                         pinctrl_nand: nand-0 {
490                                                 atmel,pins =
491                                                         <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP     /* PA22 gpio RDY pin pull_up*/
492                                                          AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PD15 gpio enable pin pull_up */
493                                         };
494                                 };
495
496                                 macb {
497                                         pinctrl_macb_rmii: macb_rmii-0 {
498                                                 atmel,pins =
499                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC25 periph B */
500                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
501                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
502                                                          AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
503                                                          AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
504                                                          AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
505                                                          AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
506                                                          AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
507                                                          AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
508                                                          AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
509                                         };
510
511                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
512                                                 atmel,pins =
513                                                         <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC20 periph B */
514                                                          AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC21 periph B */
515                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC22 periph B */
516                                                          AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC23 periph B */
517                                                          AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC24 periph B */
518                                                          AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC25 periph B */
519                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC27 periph B */
520                                                          AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
521                                         };
522                                 };
523
524                                 mmc0 {
525                                         pinctrl_mmc0_clk: mmc0_clk-0 {
526                                                 atmel,pins =
527                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
528                                         };
529
530                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
531                                                 atmel,pins =
532                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
533                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA0 periph A with pullup */
534                                         };
535
536                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
537                                                 atmel,pins =
538                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
539                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
540                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
541                                         };
542
543                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
544                                                 atmel,pins =
545                                                         <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
546                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA17 periph A with pullup */
547                                         };
548
549                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
550                                                 atmel,pins =
551                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
552                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
553                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
554                                         };
555                                 };
556
557                                 mmc1 {
558                                         pinctrl_mmc1_clk: mmc1_clk-0 {
559                                                 atmel,pins =
560                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
561                                         };
562
563                                         pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
564                                                 atmel,pins =
565                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
566                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA8 periph A with pullup */
567                                         };
568
569                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
570                                                 atmel,pins =
571                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
572                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA10 periph A with pullup */
573                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA11 periph A with pullup */
574                                         };
575
576                                         pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
577                                                 atmel,pins =
578                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA21 periph A with pullup */
579                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA22 periph A with pullup */
580                                         };
581
582                                         pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
583                                                 atmel,pins =
584                                                         <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA23 periph A with pullup */
585                                                          AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
586                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA25 periph A with pullup */
587                                         };
588                                 };
589
590                                 ssc0 {
591                                         pinctrl_ssc0_tx: ssc0_tx-0 {
592                                                 atmel,pins =
593                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB0 periph B */
594                                                          AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB1 periph B */
595                                                          AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
596                                         };
597
598                                         pinctrl_ssc0_rx: ssc0_rx-0 {
599                                                 atmel,pins =
600                                                         <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B */
601                                                          AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B */
602                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B */
603                                         };
604                                 };
605
606                                 ssc1 {
607                                         pinctrl_ssc1_tx: ssc1_tx-0 {
608                                                 atmel,pins =
609                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A */
610                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB7 periph A */
611                                                          AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
612                                         };
613
614                                         pinctrl_ssc1_rx: ssc1_rx-0 {
615                                                 atmel,pins =
616                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A */
617                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A */
618                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
619                                         };
620                                 };
621
622                                 spi0 {
623                                         pinctrl_spi0: spi0-0 {
624                                                 atmel,pins =
625                                                         <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA0 periph B SPI0_MISO pin */
626                                                          AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA1 periph B SPI0_MOSI pin */
627                                                          AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PA2 periph B SPI0_SPCK pin */
628                                         };
629                                 };
630
631                                 spi1 {
632                                         pinctrl_spi1: spi1-0 {
633                                                 atmel,pins =
634                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A SPI1_MISO pin */
635                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A SPI1_MOSI pin */
636                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
637                                         };
638                                 };
639
640                                 tcb0 {
641                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
642                                                 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
643                                         };
644
645                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
646                                                 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
647                                         };
648
649                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
650                                                 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
651                                         };
652
653                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
654                                                 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
655                                         };
656
657                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
658                                                 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
659                                         };
660
661                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
662                                                 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
663                                         };
664
665                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
666                                                 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
667                                         };
668
669                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
670                                                 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
671                                         };
672
673                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
674                                                 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
675                                         };
676                                 };
677
678                                 fb {
679                                         pinctrl_fb: fb-0 {
680                                                 atmel,pins =
681                                                         <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC1 periph A */
682                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC2 periph A */
683                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC3 periph A */
684                                                          AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB9 periph B */
685                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 periph A */
686                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 periph A */
687                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 periph A */
688                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 periph A */
689                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 periph A */
690                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A */
691                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A */
692                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC15 periph A */
693                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A */
694                                                          AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC12 periph B */
695                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC18 periph A */
696                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A */
697                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A */
698                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A */
699                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC24 periph A */
700                                                          AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC17 periph B */
701                                                          AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC26 periph A */
702                                                          AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
703                                         };
704                                 };
705
706                                 can {
707                                         pinctrl_can_rx_tx: can_rx_tx {
708                                                 atmel,pins =
709                                                         <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* CANRX, conflicts with IRQ0 */
710                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
711                                         };
712                                 };
713
714                                 ac97 {
715                                         pinctrl_ac97: ac97-0 {
716                                                 atmel,pins =
717                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB12 periph A AC97FS pin */
718                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB13 periph A AC97CK pin */
719                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB14 periph A AC97TX pin */
720                                                          AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB14 periph A AC97RX pin */
721                                         };
722                                 };
723
724                         };
725
726                         pioA: gpio@fffff200 {
727                                 compatible = "atmel,at91rm9200-gpio";
728                                 reg = <0xfffff200 0x200>;
729                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
730                                 #gpio-cells = <2>;
731                                 gpio-controller;
732                                 interrupt-controller;
733                                 #interrupt-cells = <2>;
734                                 clocks = <&pioA_clk>;
735                                 u-boot,dm-pre-reloc;
736                         };
737
738                         pioB: gpio@fffff400 {
739                                 compatible = "atmel,at91rm9200-gpio";
740                                 reg = <0xfffff400 0x200>;
741                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
742                                 #gpio-cells = <2>;
743                                 gpio-controller;
744                                 interrupt-controller;
745                                 #interrupt-cells = <2>;
746                                 clocks = <&pioB_clk>;
747                                 u-boot,dm-pre-reloc;
748                         };
749
750                         pioC: gpio@fffff600 {
751                                 compatible = "atmel,at91rm9200-gpio";
752                                 reg = <0xfffff600 0x200>;
753                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
754                                 #gpio-cells = <2>;
755                                 gpio-controller;
756                                 interrupt-controller;
757                                 #interrupt-cells = <2>;
758                                 clocks = <&pioCDE_clk>;
759                                 u-boot,dm-pre-reloc;
760                         };
761
762                         pioD: gpio@fffff800 {
763                                 compatible = "atmel,at91rm9200-gpio";
764                                 reg = <0xfffff800 0x200>;
765                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
766                                 #gpio-cells = <2>;
767                                 gpio-controller;
768                                 interrupt-controller;
769                                 #interrupt-cells = <2>;
770                                 clocks = <&pioCDE_clk>;
771                                 u-boot,dm-pre-reloc;
772                         };
773
774                         pioE: gpio@fffffa00 {
775                                 compatible = "atmel,at91rm9200-gpio";
776                                 reg = <0xfffffa00 0x200>;
777                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
778                                 #gpio-cells = <2>;
779                                 gpio-controller;
780                                 interrupt-controller;
781                                 #interrupt-cells = <2>;
782                                 clocks = <&pioCDE_clk>;
783                                 u-boot,dm-pre-reloc;
784                         };
785
786                         dbgu: serial@ffffee00 {
787                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
788                                 reg = <0xffffee00 0x200>;
789                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
790                                 pinctrl-names = "default";
791                                 pinctrl-0 = <&pinctrl_dbgu>;
792                                 clocks = <&mck>;
793                                 clock-names = "usart";
794                                 status = "disabled";
795                         };
796
797                         usart0: serial@fff8c000 {
798                                 compatible = "atmel,at91sam9260-usart";
799                                 reg = <0xfff8c000 0x200>;
800                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
801                                 atmel,use-dma-rx;
802                                 atmel,use-dma-tx;
803                                 pinctrl-names = "default";
804                                 pinctrl-0 = <&pinctrl_usart0>;
805                                 clocks = <&usart0_clk>;
806                                 clock-names = "usart";
807                                 status = "disabled";
808                         };
809
810                         usart1: serial@fff90000 {
811                                 compatible = "atmel,at91sam9260-usart";
812                                 reg = <0xfff90000 0x200>;
813                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
814                                 atmel,use-dma-rx;
815                                 atmel,use-dma-tx;
816                                 pinctrl-names = "default";
817                                 pinctrl-0 = <&pinctrl_usart1>;
818                                 clocks = <&usart1_clk>;
819                                 clock-names = "usart";
820                                 status = "disabled";
821                         };
822
823                         usart2: serial@fff94000 {
824                                 compatible = "atmel,at91sam9260-usart";
825                                 reg = <0xfff94000 0x200>;
826                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
827                                 atmel,use-dma-rx;
828                                 atmel,use-dma-tx;
829                                 pinctrl-names = "default";
830                                 pinctrl-0 = <&pinctrl_usart2>;
831                                 clocks = <&usart2_clk>;
832                                 clock-names = "usart";
833                                 status = "disabled";
834                         };
835
836                         ssc0: ssc@fff98000 {
837                                 compatible = "atmel,at91rm9200-ssc";
838                                 reg = <0xfff98000 0x4000>;
839                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
840                                 pinctrl-names = "default";
841                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
842                                 clocks = <&ssc0_clk>;
843                                 clock-names = "pclk";
844                                 status = "disabled";
845                         };
846
847                         ssc1: ssc@fff9c000 {
848                                 compatible = "atmel,at91rm9200-ssc";
849                                 reg = <0xfff9c000 0x4000>;
850                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
851                                 pinctrl-names = "default";
852                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
853                                 clocks = <&ssc1_clk>;
854                                 clock-names = "pclk";
855                                 status = "disabled";
856                         };
857
858                         ac97: sound@fffa0000 {
859                                 compatible = "atmel,at91sam9263-ac97c";
860                                 reg = <0xfffa0000 0x4000>;
861                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
862                                 pinctrl-names = "default";
863                                 pinctrl-0 = <&pinctrl_ac97>;
864                                 clocks = <&ac97_clk>;
865                                 clock-names = "ac97_clk";
866                                 status = "disabled";
867                         };
868
869                         macb0: ethernet@fffbc000 {
870                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
871                                 reg = <0xfffbc000 0x100>;
872                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
873                                 pinctrl-names = "default";
874                                 pinctrl-0 = <&pinctrl_macb_rmii>;
875                                 clocks = <&macb0_clk>, <&macb0_clk>;
876                                 clock-names = "hclk", "pclk";
877                                 status = "disabled";
878                         };
879
880                         usb1: gadget@fff78000 {
881                                 compatible = "atmel,at91sam9263-udc";
882                                 reg = <0xfff78000 0x4000>;
883                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
884                                 clocks = <&udc_clk>, <&udpck>;
885                                 clock-names = "pclk", "hclk";
886                                 status = "disabled";
887                         };
888
889                         i2c0: i2c@fff88000 {
890                                 compatible = "atmel,at91sam9260-i2c";
891                                 reg = <0xfff88000 0x100>;
892                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
893                                 #address-cells = <1>;
894                                 #size-cells = <0>;
895                                 clocks = <&twi0_clk>;
896                                 status = "disabled";
897                         };
898
899                         mmc0: mmc@fff80000 {
900                                 compatible = "atmel,hsmci";
901                                 reg = <0xfff80000 0x600>;
902                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
903                                 pinctrl-names = "default";
904                                 #address-cells = <1>;
905                                 #size-cells = <0>;
906                                 clocks = <&mci0_clk>;
907                                 clock-names = "mci_clk";
908                                 status = "disabled";
909                         };
910
911                         mmc1: mmc@fff84000 {
912                                 compatible = "atmel,hsmci";
913                                 reg = <0xfff84000 0x600>;
914                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
915                                 pinctrl-names = "default";
916                                 #address-cells = <1>;
917                                 #size-cells = <0>;
918                                 clocks = <&mci1_clk>;
919                                 clock-names = "mci_clk";
920                                 status = "disabled";
921                         };
922
923                         watchdog@fffffd40 {
924                                 compatible = "atmel,at91sam9260-wdt";
925                                 reg = <0xfffffd40 0x10>;
926                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
927                                 clocks = <&slow_xtal>;
928                                 atmel,watchdog-type = "hardware";
929                                 atmel,reset-type = "all";
930                                 atmel,dbg-halt;
931                                 status = "disabled";
932                         };
933
934                         spi0: spi@fffa4000 {
935                                 #address-cells = <1>;
936                                 #size-cells = <0>;
937                                 compatible = "atmel,at91rm9200-spi";
938                                 reg = <0xfffa4000 0x200>;
939                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
940                                 pinctrl-names = "default";
941                                 pinctrl-0 = <&pinctrl_spi0>;
942                                 clocks = <&spi0_clk>;
943                                 clock-names = "spi_clk";
944                                 status = "disabled";
945                         };
946
947                         spi1: spi@fffa8000 {
948                                 #address-cells = <1>;
949                                 #size-cells = <0>;
950                                 compatible = "atmel,at91rm9200-spi";
951                                 reg = <0xfffa8000 0x200>;
952                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
953                                 pinctrl-names = "default";
954                                 pinctrl-0 = <&pinctrl_spi1>;
955                                 clocks = <&spi1_clk>;
956                                 clock-names = "spi_clk";
957                                 status = "disabled";
958                         };
959
960                         pwm0: pwm@fffb8000 {
961                                 compatible = "atmel,at91sam9rl-pwm";
962                                 reg = <0xfffb8000 0x300>;
963                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
964                                 #pwm-cells = <3>;
965                                 clocks = <&pwm_clk>;
966                                 clock-names = "pwm_clk";
967                                 status = "disabled";
968                         };
969
970                         can: can@fffac000 {
971                                 compatible = "atmel,at91sam9263-can";
972                                 reg = <0xfffac000 0x300>;
973                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
974                                 pinctrl-names = "default";
975                                 pinctrl-0 = <&pinctrl_can_rx_tx>;
976                                 clocks = <&can_clk>;
977                                 clock-names = "can_clk";
978                         };
979
980                         rtc@fffffd20 {
981                                 compatible = "atmel,at91sam9260-rtt";
982                                 reg = <0xfffffd20 0x10>;
983                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
984                                 clocks = <&slow_xtal>;
985                                 status = "disabled";
986                         };
987
988                         rtc@fffffd50 {
989                                 compatible = "atmel,at91sam9260-rtt";
990                                 reg = <0xfffffd50 0x10>;
991                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
992                                 clocks = <&slow_xtal>;
993                                 status = "disabled";
994                         };
995
996                         gpbr: syscon@fffffd60 {
997                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
998                                 reg = <0xfffffd60 0x50>;
999                                 status = "disabled";
1000                         };
1001                 };
1002
1003                 fb0: fb@0x00700000 {
1004                         compatible = "atmel,at91sam9263-lcdc";
1005                         reg = <0x00700000 0x1000>;
1006                         interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
1007                         pinctrl-names = "default";
1008                         pinctrl-0 = <&pinctrl_fb>;
1009                         clocks = <&lcd_clk>, <&lcd_clk>;
1010                         clock-names = "lcdc_clk", "hclk";
1011                         status = "disabled";
1012                 };
1013
1014                 nand0: nand@40000000 {
1015                         compatible = "atmel,at91rm9200-nand";
1016                         #address-cells = <1>;
1017                         #size-cells = <1>;
1018                         reg = <0x40000000 0x10000000
1019                                0xffffe000 0x200
1020                               >;
1021                         atmel,nand-addr-offset = <21>;
1022                         atmel,nand-cmd-offset = <22>;
1023                         pinctrl-names = "default";
1024                         pinctrl-0 = <&pinctrl_nand>;
1025                         gpios = <&pioA 22 GPIO_ACTIVE_HIGH
1026                                  &pioD 15 GPIO_ACTIVE_HIGH
1027                                  0
1028                                 >;
1029                         status = "disabled";
1030                 };
1031
1032                 usb0: ohci@00a00000 {
1033                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1034                         reg = <0x00a00000 0x100000>;
1035                         interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
1036                         clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1037                         clock-names = "ohci_clk", "hclk", "uhpck";
1038                         status = "disabled";
1039                 };
1040         };
1041
1042         i2c-gpio-0 {
1043                 compatible = "i2c-gpio";
1044                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1045                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1046                         >;
1047                 i2c-gpio,sda-open-drain;
1048                 i2c-gpio,scl-open-drain;
1049                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1050                 #address-cells = <1>;
1051                 #size-cells = <0>;
1052                 status = "disabled";
1053         };
1054 };