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1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5
6 /* This include file covers the common peripherals and configuration between
7  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
8  * bcm2835.dtsi and bcm2836.dtsi.
9  */
10
11 / {
12         compatible = "brcm,bcm2835";
13         model = "BCM2835";
14         interrupt-parent = <&intc>;
15         #address-cells = <1>;
16         #size-cells = <1>;
17
18         chosen {
19                 bootargs = "earlyprintk console=ttyAMA0";
20         };
21
22         soc: soc {
23                 compatible = "simple-bus";
24                 #address-cells = <1>;
25                 #size-cells = <1>;
26
27                 timer@7e003000 {
28                         compatible = "brcm,bcm2835-system-timer";
29                         reg = <0x7e003000 0x1000>;
30                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
31                         /* This could be a reference to BCM2835_CLOCK_TIMER,
32                          * but we don't have the driver using the common clock
33                          * support yet.
34                          */
35                         clock-frequency = <1000000>;
36                 };
37
38                 dma: dma@7e007000 {
39                         compatible = "brcm,bcm2835-dma";
40                         reg = <0x7e007000 0xf00>;
41                         interrupts = <1 16>,
42                                      <1 17>,
43                                      <1 18>,
44                                      <1 19>,
45                                      <1 20>,
46                                      <1 21>,
47                                      <1 22>,
48                                      <1 23>,
49                                      <1 24>,
50                                      <1 25>,
51                                      <1 26>,
52                                      /* dma channel 11-14 share one irq */
53                                      <1 27>,
54                                      <1 27>,
55                                      <1 27>,
56                                      <1 27>,
57                                      /* unused shared irq for all channels */
58                                      <1 28>;
59                         interrupt-names = "dma0",
60                                           "dma1",
61                                           "dma2",
62                                           "dma3",
63                                           "dma4",
64                                           "dma5",
65                                           "dma6",
66                                           "dma7",
67                                           "dma8",
68                                           "dma9",
69                                           "dma10",
70                                           "dma11",
71                                           "dma12",
72                                           "dma13",
73                                           "dma14",
74                                           "dma-shared-all";
75                         #dma-cells = <1>;
76                         brcm,dma-channel-mask = <0x7f35>;
77                 };
78
79                 intc: interrupt-controller@7e00b200 {
80                         compatible = "brcm,bcm2835-armctrl-ic";
81                         reg = <0x7e00b200 0x200>;
82                         interrupt-controller;
83                         #interrupt-cells = <2>;
84                 };
85
86                 watchdog@7e100000 {
87                         compatible = "brcm,bcm2835-pm-wdt";
88                         reg = <0x7e100000 0x28>;
89                 };
90
91                 clocks: cprman@7e101000 {
92                         compatible = "brcm,bcm2835-cprman";
93                         #clock-cells = <1>;
94                         reg = <0x7e101000 0x2000>;
95
96                         /* CPRMAN derives everything from the platform's
97                          * oscillator.
98                          */
99                         clocks = <&clk_osc>;
100                 };
101
102                 rng@7e104000 {
103                         compatible = "brcm,bcm2835-rng";
104                         reg = <0x7e104000 0x10>;
105                 };
106
107                 mailbox: mailbox@7e00b800 {
108                         compatible = "brcm,bcm2835-mbox";
109                         reg = <0x7e00b880 0x40>;
110                         interrupts = <0 1>;
111                         #mbox-cells = <0>;
112                 };
113
114                 gpio: gpio@7e200000 {
115                         compatible = "brcm,bcm2835-gpio";
116                         reg = <0x7e200000 0xb4>;
117                         /*
118                          * The GPIO IP block is designed for 3 banks of GPIOs.
119                          * Each bank has a GPIO interrupt for itself.
120                          * There is an overall "any bank" interrupt.
121                          * In order, these are GIC interrupts 17, 18, 19, 20.
122                          * Since the BCM2835 only has 2 banks, the 2nd bank
123                          * interrupt output appears to be mirrored onto the
124                          * 3rd bank's interrupt signal.
125                          * So, a bank0 interrupt shows up on 17, 20, and
126                          * a bank1 interrupt shows up on 18, 19, 20!
127                          */
128                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
129
130                         gpio-controller;
131                         #gpio-cells = <2>;
132
133                         interrupt-controller;
134                         #interrupt-cells = <2>;
135                 };
136
137                 uart0: serial@7e201000 {
138                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
139                         reg = <0x7e201000 0x1000>;
140                         interrupts = <2 25>;
141                         clocks = <&clocks BCM2835_CLOCK_UART>,
142                                  <&clocks BCM2835_CLOCK_VPU>;
143                         clock-names = "uartclk", "apb_pclk";
144                         arm,primecell-periphid = <0x00241011>;
145                 };
146
147                 i2s: i2s@7e203000 {
148                         compatible = "brcm,bcm2835-i2s";
149                         reg = <0x7e203000 0x20>,
150                               <0x7e101098 0x02>;
151
152                         dmas = <&dma 2>,
153                                <&dma 3>;
154                         dma-names = "tx", "rx";
155                         status = "disabled";
156                 };
157
158                 spi: spi@7e204000 {
159                         compatible = "brcm,bcm2835-spi";
160                         reg = <0x7e204000 0x1000>;
161                         interrupts = <2 22>;
162                         clocks = <&clocks BCM2835_CLOCK_VPU>;
163                         #address-cells = <1>;
164                         #size-cells = <0>;
165                         status = "disabled";
166                 };
167
168                 i2c0: i2c@7e205000 {
169                         compatible = "brcm,bcm2835-i2c";
170                         reg = <0x7e205000 0x1000>;
171                         interrupts = <2 21>;
172                         clocks = <&clocks BCM2835_CLOCK_VPU>;
173                         #address-cells = <1>;
174                         #size-cells = <0>;
175                         status = "disabled";
176                 };
177
178                 pixelvalve@7e206000 {
179                         compatible = "brcm,bcm2835-pixelvalve0";
180                         reg = <0x7e206000 0x100>;
181                         interrupts = <2 13>; /* pwa0 */
182                 };
183
184                 pixelvalve@7e207000 {
185                         compatible = "brcm,bcm2835-pixelvalve1";
186                         reg = <0x7e207000 0x100>;
187                         interrupts = <2 14>; /* pwa1 */
188                 };
189
190                 aux: aux@0x7e215000 {
191                         compatible = "brcm,bcm2835-aux";
192                         #clock-cells = <1>;
193                         reg = <0x7e215000 0x8>;
194                         clocks = <&clocks BCM2835_CLOCK_VPU>;
195                 };
196
197                 uart1: serial@7e215040 {
198                         compatible = "brcm,bcm2835-aux-uart";
199                         reg = <0x7e215040 0x40>;
200                         interrupts = <1 29>;
201                         clocks = <&aux BCM2835_AUX_CLOCK_UART>;
202                         status = "disabled";
203                 };
204
205                 spi1: spi@7e215080 {
206                         compatible = "brcm,bcm2835-aux-spi";
207                         reg = <0x7e215080 0x40>;
208                         interrupts = <1 29>;
209                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
210                         #address-cells = <1>;
211                         #size-cells = <0>;
212                         status = "disabled";
213                 };
214
215                 spi2: spi@7e2150c0 {
216                         compatible = "brcm,bcm2835-aux-spi";
217                         reg = <0x7e2150c0 0x40>;
218                         interrupts = <1 29>;
219                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
220                         #address-cells = <1>;
221                         #size-cells = <0>;
222                         status = "disabled";
223                 };
224
225                 pwm: pwm@7e20c000 {
226                         compatible = "brcm,bcm2835-pwm";
227                         reg = <0x7e20c000 0x28>;
228                         clocks = <&clocks BCM2835_CLOCK_PWM>;
229                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
230                         assigned-clock-rates = <10000000>;
231                         #pwm-cells = <2>;
232                         status = "disabled";
233                 };
234
235                 sdhci: sdhci@7e300000 {
236                         compatible = "brcm,bcm2835-sdhci";
237                         reg = <0x7e300000 0x100>;
238                         interrupts = <2 30>;
239                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
240                         status = "disabled";
241                 };
242
243                 hvs@7e400000 {
244                         compatible = "brcm,bcm2835-hvs";
245                         reg = <0x7e400000 0x6000>;
246                         interrupts = <2 1>;
247                 };
248
249                 i2c1: i2c@7e804000 {
250                         compatible = "brcm,bcm2835-i2c";
251                         reg = <0x7e804000 0x1000>;
252                         interrupts = <2 21>;
253                         clocks = <&clocks BCM2835_CLOCK_VPU>;
254                         #address-cells = <1>;
255                         #size-cells = <0>;
256                         status = "disabled";
257                 };
258
259                 i2c2: i2c@7e805000 {
260                         compatible = "brcm,bcm2835-i2c";
261                         reg = <0x7e805000 0x1000>;
262                         interrupts = <2 21>;
263                         clocks = <&clocks BCM2835_CLOCK_VPU>;
264                         #address-cells = <1>;
265                         #size-cells = <0>;
266                         status = "disabled";
267                 };
268
269                 pixelvalve@7e807000 {
270                         compatible = "brcm,bcm2835-pixelvalve2";
271                         reg = <0x7e807000 0x100>;
272                         interrupts = <2 10>; /* pixelvalve */
273                 };
274
275                 hdmi: hdmi@7e902000 {
276                         compatible = "brcm,bcm2835-hdmi";
277                         reg = <0x7e902000 0x600>,
278                               <0x7e808000 0x100>;
279                         interrupts = <2 8>, <2 9>;
280                         ddc = <&i2c2>;
281                         clocks = <&clocks BCM2835_PLLH_PIX>,
282                                  <&clocks BCM2835_CLOCK_HSM>;
283                         clock-names = "pixel", "hdmi";
284                         status = "disabled";
285                 };
286
287                 usb: usb@7e980000 {
288                         compatible = "brcm,bcm2835-usb";
289                         reg = <0x7e980000 0x10000>;
290                         interrupts = <1 9>;
291                         #address-cells = <1>;
292                         #size-cells = <0>;
293                 };
294
295                 v3d: v3d@7ec00000 {
296                         compatible = "brcm,bcm2835-v3d";
297                         reg = <0x7ec00000 0x1000>;
298                         interrupts = <1 10>;
299                 };
300
301                 vc4: gpu {
302                         compatible = "brcm,bcm2835-vc4";
303                 };
304         };
305
306         clocks {
307                 compatible = "simple-bus";
308                 #address-cells = <1>;
309                 #size-cells = <0>;
310
311                 /* The oscillator is the root of the clock tree. */
312                 clk_osc: clock@3 {
313                         compatible = "fixed-clock";
314                         reg = <3>;
315                         #clock-cells = <0>;
316                         clock-output-names = "osc";
317                         clock-frequency = <19200000>;
318                 };
319
320         };
321 };
322
323 #include "bcm283x-uboot.dtsi"