2 * Samsung's Exynos4 SoC common device tree source
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SPDX-License-Identifier: GPL-2.0+
10 #include "skeleton.dtsi"
24 combiner: interrupt-controller@10440000 {
25 compatible = "samsung,exynos4210-combiner";
26 #interrupt-cells = <2>;
28 reg = <0x10440000 0x1000>;
31 gic: interrupt-controller@10490000 {
32 compatible = "arm,cortex-a9-gic";
33 #interrupt-cells = <3>;
35 cpu-offset = <0x4000>;
36 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
39 serial_0: serial@13800000 {
40 compatible = "samsung,exynos4210-uart";
41 reg = <0x13800000 0x3c>;
45 serail_1: serial@13810000 {
46 compatible = "samsung,exynos4210-uart";
47 reg = <0x13810000 0x3c>;
51 serial_2: serial@13820000 {
52 compatible = "samsung,exynos4210-uart";
53 reg = <0x13820000 0x3c>;
57 serial_3: serial@13830000 {
58 compatible = "samsung,exynos4210-uart";
59 reg = <0x13830000 0x3c>;
63 serial_4: serial@13840000 {
64 compatible = "samsung,exynos4210-uart";
65 reg = <0x13840000 0x3c>;
72 compatible = "samsung,s3c2440-i2c";
73 reg = <0x13860000 0x100>;
74 interrupt-parent = <&gic>;
75 interrupts = <0 56 0>;
81 compatible = "samsung,s3c2440-i2c";
82 reg = <0x13870000 0x100>;
83 interrupt-parent = <&gic>;
84 interrupts = <1 57 0>;
90 compatible = "samsung,s3c2440-i2c";
91 reg = <0x13880000 0x100>;
92 interrupt-parent = <&gic>;
93 interrupts = <2 58 0>;
99 compatible = "samsung,s3c2440-i2c";
100 reg = <0x13890000 0x100>;
101 interrupt-parent = <&gic>;
102 interrupts = <3 59 0>;
105 i2c_4: i2c@138a0000 {
106 #address-cells = <1>;
108 compatible = "samsung,s3c2440-i2c";
109 reg = <0x138a0000 0x100>;
110 interrupt-parent = <&gic>;
111 interrupts = <4 60 0>;
114 i2c_5: i2c@138b0000 {
115 #address-cells = <1>;
117 compatible = "samsung,s3c2440-i2c";
118 reg = <0x138b0000 0x100>;
119 interrupt-parent = <&gic>;
120 interrupts = <5 61 0>;
123 i2c_6: i2c@138c0000 {
124 #address-cells = <1>;
126 compatible = "samsung,s3c2440-i2c";
127 reg = <0x138c0000 0x100>;
128 interrupt-parent = <&gic>;
129 interrupts = <6 62 0>;
132 i2c_7: i2c@138d0000 {
133 #address-cells = <1>;
135 compatible = "samsung,s3c2440-i2c";
136 reg = <0x138d0000 0x100>;
137 interrupt-parent = <&gic>;
138 interrupts = <7 63 0>;
141 sdhci0: sdhci@12510000 {
142 #address-cells = <1>;
144 compatible = "samsung,exynos4412-sdhci";
145 reg = <0x12510000 0x1000>;
146 interrupt-parent = <&gic>;
147 interrupts = <0 75 0>;
151 sdhci1: sdhci@12520000 {
152 #address-cells = <1>;
154 compatible = "samsung,exynos4412-sdhci";
155 reg = <0x12520000 0x1000>;
156 interrupt-parent = <&gic>;
157 interrupts = <0 76 0>;
161 sdhci2: sdhci@12530000 {
162 #address-cells = <1>;
164 compatible = "samsung,exynos4412-sdhci";
165 reg = <0x12530000 0x1000>;
166 interrupt-parent = <&gic>;
167 interrupts = <0 77 0>;
171 sdhci3: sdhci@12540000 {
172 #address-cells = <1>;
174 compatible = "samsung,exynos4412-sdhci";
175 reg = <0x12540000 0x1000>;
176 interrupt-parent = <&gic>;
177 interrupts = <0 78 0>;
181 mshc_0: dwmmc@12550000 {
182 #address-cells = <1>;
184 compatible = "samsung,exynos4412-dw-mshc";
185 reg = <0x12550000 0x1000>;
186 interrupt-parent = <&gic>;
187 interrupts = <0 131 0>;