git.sur5r.net Git - u-boot/blob - arch/arm/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC common device tree source
   3  *
   4  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include "skeleton.dtsi"
  11
  12 / {
  13         combiner: interrupt-controller@10440000 {
  14                 compatible = "samsung,exynos4210-combiner";
  15                 #interrupt-cells = <2>;
  16                 interrupt-controller;
  17                 reg = <0x10440000 0x1000>;
  18         };
  19
  20         serial@13800000 {
  21                 compatible = "samsung,exynos4210-uart";
  22                 reg = <0x13800000 0x3c>;
  23                 id = <0>;
  24         };
  25
  26         serial@13810000 {
  27                 compatible = "samsung,exynos4210-uart";
  28                 reg = <0x13810000 0x3c>;
  29                 id = <1>;
  30         };
  31
  32         serial@13820000 {
  33                 compatible = "samsung,exynos4210-uart";
  34                 reg = <0x13820000 0x3c>;
  35                 id = <2>;
  36         };
  37
  38         serial@13830000 {
  39                 compatible = "samsung,exynos4210-uart";
  40                 reg = <0x13830000 0x3c>;
  41                 id = <3>;
  42         };
  43
  44         serial@13840000 {
  45                 compatible = "samsung,exynos4210-uart";
  46                 reg = <0x13840000 0x3c>;
  47                 id = <4>;
  48         };
  49
  50         i2c@13860000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53                 compatible = "samsung,s3c2440-i2c";
  54                 reg = <0x13860000 0x100>;
  55                 interrupts = <0 56 0>;
  56         };
  57
  58         i2c@13870000 {
  59                 #address-cells = <1>;
  60                 #size-cells = <0>;
  61                 compatible = "samsung,s3c2440-i2c";
  62                 reg = <0x13870000 0x100>;
  63                 interrupts = <1 57 0>;
  64         };
  65
  66         i2c@13880000 {
  67                 #address-cells = <1>;
  68                 #size-cells = <0>;
  69                 compatible = "samsung,s3c2440-i2c";
  70                 reg = <0x13880000 0x100>;
  71                 interrupts = <2 58 0>;
  72         };
  73
  74         i2c@13890000 {
  75                 #address-cells = <1>;
  76                 #size-cells = <0>;
  77                 compatible = "samsung,s3c2440-i2c";
  78                 reg = <0x13890000 0x100>;
  79                 interrupts = <3 59 0>;
  80         };
  81
  82         i2c@138a0000 {
  83                 #address-cells = <1>;
  84                 #size-cells = <0>;
  85                 compatible = "samsung,s3c2440-i2c";
  86                 reg = <0x138a0000 0x100>;
  87                 interrupts = <4 60 0>;
  88         };
  89
  90         i2c@138b0000 {
  91                 #address-cells = <1>;
  92                 #size-cells = <0>;
  93                 compatible = "samsung,s3c2440-i2c";
  94                 reg = <0x138b0000 0x100>;
  95                 interrupts = <5 61 0>;
  96         };
  97
  98         i2c@138c0000 {
  99                 #address-cells = <1>;
 100                 #size-cells = <0>;
 101                 compatible = "samsung,s3c2440-i2c";
 102                 reg = <0x138c0000 0x100>;
 103                 interrupts = <6 62 0>;
 104         };
 105
 106         i2c@138d0000 {
 107                 #address-cells = <1>;
 108                 #size-cells = <0>;
 109                 compatible = "samsung,s3c2440-i2c";
 110                 reg = <0x138d0000 0x100>;
 111                 interrupts = <7 63 0>;
 112         };
 113
 114         sdhci@12510000 {
 115                 #address-cells = <1>;
 116                 #size-cells = <0>;
 117                 compatible = "samsung,exynos-mmc";
 118                 reg = <0x12510000 0x1000>;
 119                 interrupts = <0 75 0>;
 120         };
 121
 122         sdhci@12520000 {
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125                 compatible = "samsung,exynos-mmc";
 126                 reg = <0x12520000 0x1000>;
 127                 interrupts = <0 76 0>;
 128         };
 129
 130         sdhci@12530000 {
 131                 #address-cells = <1>;
 132                 #size-cells = <0>;
 133                 compatible = "samsung,exynos-mmc";
 134                 reg = <0x12530000 0x1000>;
 135                 interrupts = <0 77 0>;
 136         };
 137
 138         sdhci@12540000 {
 139                 #address-cells = <1>;
 140                 #size-cells = <0>;
 141                 compatible = "samsung,exynos-mmc";
 142                 reg = <0x12540000 0x1000>;
 143                 interrupts = <0 78 0>;
 144         };
 145
 146         dwmmc@12550000 {
 147                 #address-cells = <1>;
 148                 #size-cells = <0>;
 149                 compatible = "samsung,exynos-dwmmc";
 150                 reg = <0x12550000 0x1000>;
 151                 interrupts = <0 131 0>;
 152         };
 153
 154 };