2 * SAMSUNG/GOOGLE Peach-Pit board device tree source
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SPDX-License-Identifier: GPL-2.0+
11 #include "exynos54xx.dtsi"
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
16 model = "Samsung/Google Peach Pit board based on Exynos5420";
18 compatible = "google,pit-rev#", "google,pit",
19 "google,peach", "samsung,exynos5420", "samsung,exynos5";
22 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
23 hwid = "PIT TEST A-A 7848";
28 serial0 = "/serial@12C30000";
29 console = "/serial@12C30000";
30 pmic = "/i2c@12CA0000";
34 backlight: backlight {
35 compatible = "pwm-backlight";
36 pwms = <&pwm 0 1000000 0>;
37 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
38 default-brightness-level = <7>;
39 power-supply = <&tps65090_fet1>;
43 mem-manuf = "samsung";
45 clock-frequency = <800000000>;
46 arm-frequency = <900000000>;
50 samsung,min-temp = <25>;
51 samsung,max-temp = <125>;
52 samsung,start-warning = <95>;
53 samsung,start-tripping = <105>;
54 samsung,hw-tripping = <110>;
55 samsung,efuse-min-value = <40>;
56 samsung,efuse-value = <55>;
57 samsung,efuse-max-value = <100>;
58 samsung,slope = <274761730>;
59 samsung,dc-value = <25>;
62 /* MAX77802 is on i2c bus 4 */
64 clock-frequency = <400000>;
66 compatible = "maxim,max77802-pmic";
71 i2c@12CD0000 { /* i2c7 */
72 clock-frequency = <100000>;
75 compatible = "maxim,max98090-codec";
79 compatible = "parade,ps8625";
81 sleep-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
82 reset-gpios = <&gpy7 7 GPIO_ACTIVE_LOW>;
83 parade,regs = /bits/ 8 <
84 0x02 0xa1 0x01 /* HPD low */
87 * [1:0] SW output 1.2V voltage is lower to 96%
92 * [5:4] = b01 0.5%, b10 1%, b11 1.5%
95 0x04 0xe2 0x80 /* [7] RCO SS enable */
98 * [3:2] CDR tune wait cycle before
99 * measure for fine tune b00: 1us,
100 * 01: 0.5us, 10:2us, 11:4us.
103 0x04 0x89 0x08 /* [3] RFD always on */
106 * 20000ppm/80000ppm. Lock out 2
112 * NOF=40LSB for HBR CDR setting
115 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
116 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
119 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
122 0x04 0xc1 0x92 /* Gitune=-37% */
123 0x04 0xc2 0x1c /* Fbstep=100% */
124 0x04 0x32 0x80 /* [7]LOS signal disable */
127 * [7:4] LVDS driver bias current :
132 * [7:6] Right-bar GPIO output strength is 8mA
135 /* EQ Training State Machine Setting */
136 0x04 0x54 0x10 /* RCO calibration start */
137 /* [4:0] MAX_LANE_COUNT set to one lane */
139 /* [4:0] LANE_COUNT_SET set to one lane */
142 0x00 0xf1 0x03 /* HPD CP toggle enable */
144 /* Counter number add 1ms counter delay */
147 * [6]PWM function control by
148 * DPCD0040f[7], default is PWM
149 * block always works.
153 * 04h Adjust VTotal tolerance to
154 * fix the 30Hz no display issue
157 /* DPCD00400='h00, Parade OUI = 'h001cf8 */
159 0x01 0xc1 0x1c /* DPCD00401='h1c */
160 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
162 * DPCD403~408 = ASCII code
163 * D2SLV5='h4432534c5635
166 0x01 0xc4 0x32 /* DPCD404 */
167 0x01 0xc5 0x53 /* DPCD405 */
168 0x01 0xc6 0x4c /* DPCD406 */
169 0x01 0xc7 0x56 /* DPCD407 */
170 0x01 0xc8 0x35 /* DPCD408 */
172 * DPCD40A, Initial Code major revision
176 /* DPCD40B Initial Code minor revision '05' */
178 /* DPCD720 Select internal PWM */
181 * FFh for 100% PWM of brightness, 0h for 0%
186 * Set LVDS output as 6bit-VESA mapping,
187 * single LVDS channel
190 /* Enable SSC set by register */
193 * Set SSC enabled and +/-1% central
197 /* MPU Clock source: LC => RCO */
199 0x04 0x54 0x14 /* LC -> RCO */
200 0x02 0xa1 0x91>; /* HPD high */
204 bridge_out: endpoint {
205 remote-endpoint = <&panel_in>;
210 bridge_in: endpoint {
211 remote-endpoint = <&dp_out>;
219 samsung,codec-type = "max98090";
222 i2c@12E10000 { /* i2c9 */
223 clock-frequency = <400000>;
225 compatible = "infineon,slb9645tt";
231 compatible = "auo,b116xw03";
232 power-supply = <&tps65090_fet6>;
233 backlight = <&backlight>;
237 remote-endpoint = <&bridge_out>;
242 spi@12d30000 { /* spi1 */
243 spi-max-frequency = <50000000>;
244 firmware_storage_spi: flash@0 {
245 compatible = "spi-flash";
249 * A region for the kernel to store a panic event
250 * which the firmware will add to the log.
252 elog-panic-event-offset = <0x01e00000 0x100000>;
254 elog-shrink-size = <0x400>;
255 elog-full-threshold = <0xc00>;
260 samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
264 samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
268 samsung,vl-freq = <60>;
269 samsung,vl-col = <1366>;
270 samsung,vl-row = <768>;
271 samsung,vl-width = <1366>;
272 samsung,vl-height = <768>;
276 samsung,vl-bpix = <4>;
278 samsung,vl-hspw = <32>;
279 samsung,vl-hbpd = <40>;
280 samsung,vl-hfpd = <40>;
281 samsung,vl-vspw = <6>;
282 samsung,vl-vbpd = <10>;
283 samsung,vl-vfpd = <12>;
284 samsung,vl-cmd-allow-len = <0xf>;
287 samsung,interface-mode = <1>;
288 samsung,dp-enabled = <1>;
289 samsung,dual-lcd-enabled = <0>;
295 samsung,color-space = <0>;
296 samsung,dynamic-range = <0>;
297 samsung,ycbcr-coeff = <0>;
298 samsung,color-depth = <1>;
299 samsung,link-rate = <0x06>;
300 samsung,lane-count = <2>;
301 samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
306 remote-endpoint = <&bridge_in>;
313 spi-max-frequency = <3125000>;
314 spi-deactivate-delay = <200>;
317 samsung,spi-src-clk = <0>;
318 cs-gpios = <&gpb1 2 0>;
321 compatible = "google,cros-ec-spi";
322 interrupt-parent = <&gpx1>;
326 spi-max-timeout-ms = <1100>;
327 ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
328 #address-cells = <1>;
332 * This describes the flash memory within the EC. Note
333 * that the STM32L flash erases to 0, not 0xff.
336 reg = <0x08000000 0x20000>;
341 samsung,spi-feedback-delay = <1>;
344 i2c_tunnel: i2c-tunnel {
345 compatible = "google,cros-ec-i2c-tunnel";
346 #address-cells = <1>;
348 google,remote-bus = <0>;
350 battery: sbs-battery@b {
351 compatible = "sbs,sbs-battery";
353 sbs,poll-retry-count = <1>;
354 sbs,i2c-retry-count = <2>;
358 compatible = "ti,tps65090";
362 tps65090_dcdc1: dcdc1 {
363 ti,enable-ext-control;
365 tps65090_dcdc2: dcdc2 {
366 ti,enable-ext-control;
368 tps65090_dcdc3: dcdc3 {
369 ti,enable-ext-control;
371 tps65090_fet1: fet1 {
372 regulator-name = "vcd_led";
374 tps65090_fet2: fet2 {
375 regulator-name = "video_mid";
378 tps65090_fet3: fet3 {
379 regulator-name = "wwan_r";
382 tps65090_fet4: fet4 {
383 regulator-name = "sdcard";
386 tps65090_fet5: fet5 {
387 regulator-name = "camout";
390 tps65090_fet6: fet6 {
391 regulator-name = "lcd_vdd";
393 tps65090_fet7: fet7 {
394 regulator-name = "video_mid_1a";
397 tps65090_ldo1: ldo1 {
399 tps65090_ldo2: ldo2 {
404 compatible = "ti,tps65090-charger";
411 #include "cros-ec-keyboard.dtsi"