1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG/GOOGLE Peach-Pit board device tree source
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
10 #include "exynos54xx.dtsi"
11 #include <dt-bindings/clock/maxim,max77802.h>
12 #include <dt-bindings/regulator/maxim,max77802.h>
15 model = "Samsung/Google Peach Pit board based on Exynos5420";
17 compatible = "google,pit-rev#", "google,pit",
18 "google,peach", "samsung,exynos5420", "samsung,exynos5";
21 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
22 hwid = "PIT TEST A-A 7848";
27 serial0 = "/serial@12C30000";
28 console = "/serial@12C30000";
29 pmic = "/i2c@12CA0000";
33 backlight: backlight {
34 compatible = "pwm-backlight";
35 pwms = <&pwm 0 1000000 0>;
36 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
37 default-brightness-level = <7>;
38 power-supply = <&tps65090_fet1>;
42 mem-manuf = "samsung";
44 clock-frequency = <800000000>;
45 arm-frequency = <900000000>;
49 samsung,min-temp = <25>;
50 samsung,max-temp = <125>;
51 samsung,start-warning = <95>;
52 samsung,start-tripping = <105>;
53 samsung,hw-tripping = <110>;
54 samsung,efuse-min-value = <40>;
55 samsung,efuse-value = <55>;
56 samsung,efuse-max-value = <100>;
57 samsung,slope = <274761730>;
58 samsung,dc-value = <25>;
61 /* MAX77802 is on i2c bus 4 */
63 clock-frequency = <400000>;
65 compatible = "maxim,max77802-pmic";
70 i2c@12CD0000 { /* i2c7 */
71 clock-frequency = <100000>;
74 compatible = "maxim,max98090-codec";
78 compatible = "parade,ps8625";
80 sleep-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
81 reset-gpios = <&gpy7 7 GPIO_ACTIVE_LOW>;
82 parade,regs = /bits/ 8 <
83 0x02 0xa1 0x01 /* HPD low */
86 * [1:0] SW output 1.2V voltage is lower to 96%
91 * [5:4] = b01 0.5%, b10 1%, b11 1.5%
94 0x04 0xe2 0x80 /* [7] RCO SS enable */
97 * [3:2] CDR tune wait cycle before
98 * measure for fine tune b00: 1us,
99 * 01: 0.5us, 10:2us, 11:4us.
102 0x04 0x89 0x08 /* [3] RFD always on */
105 * 20000ppm/80000ppm. Lock out 2
111 * NOF=40LSB for HBR CDR setting
114 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
115 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
118 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
121 0x04 0xc1 0x92 /* Gitune=-37% */
122 0x04 0xc2 0x1c /* Fbstep=100% */
123 0x04 0x32 0x80 /* [7]LOS signal disable */
126 * [7:4] LVDS driver bias current :
131 * [7:6] Right-bar GPIO output strength is 8mA
134 /* EQ Training State Machine Setting */
135 0x04 0x54 0x10 /* RCO calibration start */
136 /* [4:0] MAX_LANE_COUNT set to one lane */
138 /* [4:0] LANE_COUNT_SET set to one lane */
141 0x00 0xf1 0x03 /* HPD CP toggle enable */
143 /* Counter number add 1ms counter delay */
146 * [6]PWM function control by
147 * DPCD0040f[7], default is PWM
148 * block always works.
152 * 04h Adjust VTotal tolerance to
153 * fix the 30Hz no display issue
156 /* DPCD00400='h00, Parade OUI = 'h001cf8 */
158 0x01 0xc1 0x1c /* DPCD00401='h1c */
159 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
161 * DPCD403~408 = ASCII code
162 * D2SLV5='h4432534c5635
165 0x01 0xc4 0x32 /* DPCD404 */
166 0x01 0xc5 0x53 /* DPCD405 */
167 0x01 0xc6 0x4c /* DPCD406 */
168 0x01 0xc7 0x56 /* DPCD407 */
169 0x01 0xc8 0x35 /* DPCD408 */
171 * DPCD40A, Initial Code major revision
175 /* DPCD40B Initial Code minor revision '05' */
177 /* DPCD720 Select internal PWM */
180 * FFh for 100% PWM of brightness, 0h for 0%
185 * Set LVDS output as 6bit-VESA mapping,
186 * single LVDS channel
189 /* Enable SSC set by register */
192 * Set SSC enabled and +/-1% central
196 /* MPU Clock source: LC => RCO */
198 0x04 0x54 0x14 /* LC -> RCO */
199 0x02 0xa1 0x91>; /* HPD high */
203 bridge_out: endpoint {
204 remote-endpoint = <&panel_in>;
209 bridge_in: endpoint {
210 remote-endpoint = <&dp_out>;
218 samsung,codec-type = "max98090";
221 i2c@12E10000 { /* i2c9 */
222 clock-frequency = <400000>;
224 compatible = "infineon,slb9645tt";
230 compatible = "auo,b116xw03";
231 power-supply = <&tps65090_fet6>;
232 backlight = <&backlight>;
236 remote-endpoint = <&bridge_out>;
241 spi@12d30000 { /* spi1 */
242 spi-max-frequency = <50000000>;
243 firmware_storage_spi: flash@0 {
244 compatible = "spi-flash";
248 * A region for the kernel to store a panic event
249 * which the firmware will add to the log.
251 elog-panic-event-offset = <0x01e00000 0x100000>;
253 elog-shrink-size = <0x400>;
254 elog-full-threshold = <0xc00>;
259 samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
263 samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
267 samsung,vl-freq = <60>;
268 samsung,vl-col = <1366>;
269 samsung,vl-row = <768>;
270 samsung,vl-width = <1366>;
271 samsung,vl-height = <768>;
275 samsung,vl-bpix = <4>;
277 samsung,vl-hspw = <32>;
278 samsung,vl-hbpd = <40>;
279 samsung,vl-hfpd = <40>;
280 samsung,vl-vspw = <6>;
281 samsung,vl-vbpd = <10>;
282 samsung,vl-vfpd = <12>;
283 samsung,vl-cmd-allow-len = <0xf>;
286 samsung,interface-mode = <1>;
287 samsung,dp-enabled = <1>;
288 samsung,dual-lcd-enabled = <0>;
294 samsung,color-space = <0>;
295 samsung,dynamic-range = <0>;
296 samsung,ycbcr-coeff = <0>;
297 samsung,color-depth = <1>;
298 samsung,link-rate = <0x06>;
299 samsung,lane-count = <2>;
300 samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
305 remote-endpoint = <&bridge_in>;
312 spi-max-frequency = <3125000>;
313 spi-deactivate-delay = <200>;
316 samsung,spi-src-clk = <0>;
317 cs-gpios = <&gpb1 2 0>;
320 compatible = "google,cros-ec-spi";
321 interrupt-parent = <&gpx1>;
325 spi-max-timeout-ms = <1100>;
326 ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
327 #address-cells = <1>;
331 * This describes the flash memory within the EC. Note
332 * that the STM32L flash erases to 0, not 0xff.
335 reg = <0x08000000 0x20000>;
340 samsung,spi-feedback-delay = <1>;
343 i2c_tunnel: i2c-tunnel {
344 compatible = "google,cros-ec-i2c-tunnel";
345 #address-cells = <1>;
347 google,remote-bus = <0>;
349 battery: sbs-battery@b {
350 compatible = "sbs,sbs-battery";
352 sbs,poll-retry-count = <1>;
353 sbs,i2c-retry-count = <2>;
357 compatible = "ti,tps65090";
361 tps65090_dcdc1: dcdc1 {
362 ti,enable-ext-control;
364 tps65090_dcdc2: dcdc2 {
365 ti,enable-ext-control;
367 tps65090_dcdc3: dcdc3 {
368 ti,enable-ext-control;
370 tps65090_fet1: fet1 {
371 regulator-name = "vcd_led";
373 tps65090_fet2: fet2 {
374 regulator-name = "video_mid";
377 tps65090_fet3: fet3 {
378 regulator-name = "wwan_r";
381 tps65090_fet4: fet4 {
382 regulator-name = "sdcard";
385 tps65090_fet5: fet5 {
386 regulator-name = "camout";
389 tps65090_fet6: fet6 {
390 regulator-name = "lcd_vdd";
392 tps65090_fet7: fet7 {
393 regulator-name = "video_mid_1a";
396 tps65090_ldo1: ldo1 {
398 tps65090_ldo2: ldo2 {
403 compatible = "ti,tps65090-charger";
410 #include "cros-ec-keyboard.dtsi"