2 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
4 * Copyright (C) 2015, Freescale Semiconductor
6 * Mingkai Hu <Mingkai.hu@freescale.com>
8 * SPDX-License-Identifier: GPL-2.0+ X11
11 /include/ "fsl-ls1043a.dtsi"
14 model = "LS1043A QDS Board";
28 compatible = "spi-flash";
29 spi-max-frequency = <1000000>; /* input clock */
35 dflash1: sst25wf040b {
38 compatible = "spi-flash";
39 spi-max-frequency = <3500000>;
48 compatible = "spi-flash";
49 spi-max-frequency = <3500000>;
60 qflash0: s25fl128s@0 {
63 compatible = "spi-flash";
64 spi-max-frequency = <20000000>;
72 compatible = "philips,pca9547";
83 compatible = "dallas,ds3232";
86 interrupts = <0 150 0x4>;
96 compatible = "ti,ina220";
98 shunt-resistor = <1000>;
102 compatible = "ti,ina220";
104 shunt-resistor = <1000>;
109 #address-cells = <1>;
114 compatible = "at24,24c512";
119 compatible = "at24,24c512";
124 compatible = "adt7461a";
132 #address-cells = <2>;
134 /* NOR, NAND Flashes and FPGA on board */
135 ranges = <0x0 0x0 0x0 0x60000000 0x08000000
136 0x1 0x0 0x0 0x7e800000 0x00010000
137 0x2 0x0 0x0 0x7fb00000 0x00000100>;
141 #address-cells = <1>;
143 compatible = "cfi-flash";
144 reg = <0x0 0x0 0x8000000>;
150 compatible = "fsl,ifc-nand";
151 #address-cells = <1>;
153 reg = <0x1 0x0 0x10000>;
156 fpga: board-control@2,0 {
157 #address-cells = <1>;
159 compatible = "simple-bus";
160 reg = <0x2 0x0 0x0000100>;
163 ranges = <0 2 0 0x100>;